LPC2194 NXP Semiconductors, LPC2194 Datasheet
LPC2194
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LPC2194 Summary of contents
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... Remark: Throughout the data sheet, the term LPC2194 will apply to devices with and without the /00 or /01 suffixes. The /00 or the /01 suffix will be used to differentiate from other devices only when necessary. ...
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... Dual power supply: CPU operating voltage range of 1. 1.95 V (1.8 V 0.15 V). I/O power supply range of 3 3.6 V (3.3 V with 5 V tolerant I/O pads. 3. Ordering information Table 1. Type number LPC2194HBD64 LPC2194HBD64/00 LQFP64 LPC2194HBD64/01 LQFP64 LPC2194 Product data sheet Ordering information Package Name Description LQFP64 plastic low profile quad flat package ...
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... RD[4:1] CAN INTERFACE AND 4 (1) TD[4:1] ACCEPTANCE FILTERS (1) Shared with GPIO. (2) When test/debug interface is used, GPIO/other functions sharing these pins are not available. (3) SSP interface and high-speed GPIO are available on LPC2194/01 only. Fig 1. Block diagram LPC2194 Product data sheet (2) (2) TMS TDI ...
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... P0[28]/AIN1/CAP0[2]/MAT0[ P0[29]/AIN2/CAP0[3]/MAT0[3] P0[30]/AIN3/EINT3/CAP0[0] 15 P1[16]/TRACEPKT0 16 Fig 2. Pin configuration LPC2194 Product data sheet LPC2194 LPC2194/00 LPC2194/01 All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller 48 P1[20]/TRACESYNC 47 P0[17]/CAP1[2]/SCK1/MAT1[2] 46 P0[16]/EINT0/MAT0[2]/CAP0[2] 45 P0[15]/RI1/EINT2 44 P1[21]/PIPESTAT0 43 V DD(3V3 ...
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... DTR1 — Data Terminal Ready output for UART1. O MAT1[1] — Match output for Timer 1, channel 1. O TD4 — CAN4 transmitter output. All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller 2 C-bus compliance). 2 C-bus compliance). © NXP B.V. 2011. All rights reserved. ...
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... CAP0[3] — Capture input for Timer 0, Channel 3. O MAT0[3] — Match output for Timer 0, channel 3. All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller [1] . SPI clock output from master or input to [1] . Data input to SPI master or data [1] ...
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... O output from the oscillator amplifier. I ground reference. All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller 1 ⁄ of the CPU clock 6 © NXP B.V. 2011. All rights reserved. ...
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... DDA(1V8) V 23, 43, 51 DD(3V3 DDA(3V3) [1] SSP interface available on LPC2194/01 only. LPC2194 Product data sheet Type Description I analog ground reference. This should nominally be the same voltage as V but should be isolated to minimize noise and error. I PLL analog ground reference. This should nominally be the same voltage but should be isolated to minimize noise and error ...
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... ARM processor connected to a 16-bit memory system. 6.2 On-chip flash program memory The LPC2194 incorporates a 256 kB flash memory system. This memory may be used for both code and data storage. Programming of the flash memory may be accomplished in several ways. It may be programmed In System via the serial port. The application program may also erase and/or program the flash while the application is running, allowing a great degree of flexibility for data storage field firmware upgrades, etc ...
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... JTAG and/or ISP is restored. 6.3 On-chip SRAM On-chip SRAM may be used for code and/or data storage. The SRAM may be accessed as 8 bit, 16 bit, and 32 bit. The LPC2194 provides SRAM. 6.4 Memory map The LPC2194 memory maps incorporate several distinct regions, as shown in In addition, the CPU interrupt vectors may be re-mapped to allow them to reside in either flash memory (the default) or on-chip SRAM ...
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... ON-CHIP FLASH MEMORY) RESERVED ADDRESS SPACE 16 kB ON-CHIP STATIC RAM 1.0 GB RESERVED ADDRESS SPACE 256 kB ON-CHIP FLASH MEMORY 0.0 GB LPC2194 memory map All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller 0xFFFF FFFF 0xF000 0000 0xEFFF FFFF ...
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... Match (MR0, MR1, MR2, MR3, MR4, MR5, MR6) SI (state change) SPIF, MODF [1] SPIF, MODF and TXRIS, RXRIS, RTRIS, RORRIS PLL Lock (PLOCK) RTCCIF (Counter Increment), RTCALF (Alarm) All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller VIC channel # ...
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... Separate control of output set and clear. • All I/O default to inputs after reset. 6.7.2 Features added with the Fast GPIO set of registers available on LPC2194/01 only • Fast GPIO registers are relocated to the ARM local bus for the fastest possible I/O timing, enabling port pin toggling up to 3.5 times faster than earlier LPC2000 devices. ...
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... Acceptance Filter can provide FullCAN-style automatic reception for selected Standard identifiers. 6.10 UARTs The LPC2194 each contain two UARTs. In addition to standard transmit and receive data lines, the UART1 also provides a full modem control handshake interface. 6.10.1 Features • Receive and Transmit FIFOs. ...
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... The I controlled by more than one bus master connected to it. 2 The I C-bus implemented in LPC2194 supports a bit rate up to 400 kbit/s (Fast I 6.11.1 Features • Standard I • ...
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... NXP Semiconductors 6.12 SPI serial I/O controller The LPC2194 each contain two SPIs. The SPI is a full duplex serial interface, designed to be able to handle multiple masters and slaves connected to a given bus. Only a single master and a single slave can communicate on the interface during a given data transfer. ...
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... Do nothing on match. 6.14.2 Features available in LPC2194/01 only The LPC2194/01 can count external events on one of the capture inputs if the external pulse lasts at least one half of the period of the PCLK. In this configuration, unused capture lines can be selected as regular timer capture inputs, or used as external interrupts. • ...
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... Pulse width modulator The PWM is based on the standard Timer block and inherits all of its features, although only the PWM function is pinned out on the LPC2194. The Timer is designed to count cycles of the peripheral clock (PCLK) and optionally generate interrupts or perform other actions when specified timer values occur, based on seven match registers. The PWM function is also based on match register events ...
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... ARM processor clock frequency is referred to as CCLK for osc and CCLK are the same value unless the PLL is osc Section 6.18.2 “PLL” All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller for additional information. © NXP B.V. 2011. All rights reserved ...
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... Code security (Code Read Protection - CRP) This feature of the LPC2194/01 allows the user to enable different levels of security in the system so that access to the on-chip flash and use of the JTAG and ISP can be restricted. When needed, CRP is invoked by programming a specific pattern into a dedicated flash location ...
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... Remark: Devices without the /00 or /01 suffixes have only a security level equivalent to CRP2 available. 6.18.5 External interrupt inputs The LPC2194 include up to nine edge or level sensitive External Interrupt Inputs as selectable pin functions. When the pins are combined, external events can be processed as four independent interrupt signals. The External Interrupt Inputs can optionally be used to wake-up the processor from Power-down mode ...
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... Idle mode. 6.19 Emulation and debugging The LPC2194 support emulation and debugging via a JTAG serial port. A trace port allows tracing program execution. Debugging and trace functions are multiplexed only with GPIOs on Port 1. This means that all communication, timer and interface peripherals residing on Port 0 are available during the development and debugging phase as they are when the application is run in the embedded system itself ...
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... lightweight debug monitor that runs in the background while users debug their foreground application. It communicates with the host using the DCC (Debug Communications Channel), which is present in the EmbeddedICE logic. The LPC2194 contain a specific configuration of RealMonitor software programmed into the on-chip flash memory ...
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... Product data sheet [1] Conditions 5 V tolerant I/O pins other I/O pins based on package heat transfer, not device power consumption human body model all pins All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller Min Max 0.5 [2] +2.5 0.5 [3] +3.6 0.5 +4.6 ...
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... OL 0 DD(3V3 0 DD(3V3 [10 < V < DD(3V3) I All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller [1] Min Typ Max [2] 1.65 1.8 1.95 [3] 3.0 3.3 3.6 2.5 3.3 3 100 - - ...
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... NXP Semiconductors Table 5. Static characteristics +125 C for industrial applications, unless otherwise specified. amb Symbol Parameter Power consumption LPC2194 I active mode supply DD(act) current I Power-down mode supply DD(pd) current Power consumption LPC2194/01 I active mode supply DD(act) current I Idle mode supply current ...
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... See LPC2119/2129/2194/2292/2294 User Manual. [12 LPC2194 Product data sheet …continued Conditions is grounded. DD(3V3 All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller [1] Min Typ Max 1.8 © NXP B.V. 2011. All rights reserved. Unit ...
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... All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 Single-chip 16/32-bit microcontroller Min Typ [1][2][ [1][ [1][ [1][ [1][ LPC2194 Max Unit V V DDA 1 pF 1 LSB 2 LSB 3 LSB 0.5 % 4 LSB Figure 4. © NXP B.V. 2011. All rights reserved ...
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... All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 Single-chip 16/32-bit microcontroller (1) 1018 1019 1020 1021 1022 1023 − DDA SSA 1 LSB = 1024 LPC2194 gain offset error error 1024 002aaa668 © NXP B.V. 2011. All rights reserved ...
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... NXP Semiconductors 8.1 Power consumption measurements for LPC2194/01 The power consumption measurements represent typical values for the given conditions. The peripherals were enabled through the PCONP register, but for these measurements, the peripherals were not configured to run. Peripherals were disabled through the PCONP register ...
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... MHz (mA MHz MHz 5 1.65 Test conditions: Active mode entered executing code from on-chip flash; PCLK = Temp = 25 C; core voltage 1.8 V; all peripherals disabled. Fig 7. Typical LPC2194/01 I DD(act) 15.0 I DD(idle) (mA) 10.0 5.0 0 Test conditions: Idle mode entered executing code from on-chip flash; PCLK = = 25 C; core voltage 1.8 V. ...
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... Typical LPC2194/01 I DD(idle) 8.0 I DD(idle) (mA) 6.0 4.0 2.0 0.0 1.65 Test conditions: Idle mode entered executing code from on-chip flash; PCLK = Temp = 25 C; core voltage 1.8 V; all peripherals disabled. Fig 10. Typical LPC2194/01 I DD(idle) LPC2194 Product data sheet 60 MHz 48 MHz 12 MHz 1.80 measured at different voltages 60 MHz 48 MHz 12 MHz 1.80 measured at different voltages All information provided in this document is subject to legal disclaimers. Rev. 6 — ...
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... I DD(pd) (μA) 400 300 200 100 0 -40 -25 -10 Test conditions: Power-down mode entered executing code from on-chip flash. Fig 11. Typical LPC2194/01 core power-down current DD(act) (mA -40 -25 -10 Test conditions: code executed from on-chip flash; PCLK = core voltage 1.8 V; all peripherals disabled. ...
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... UART1 PWM0 2 I C-bus SPI0/1 RTC ADC CAN1/2/3/4 LPC2194 Product data sheet measured at different temperatures Typical LPC2194/01 peripheral power consumption in active mode all measurements in amb CCLK = 12 MHz 103 103 230 All information provided in this document is subject to legal disclaimers. ...
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... PLL is used external clock frequency if on-chip bootloader is used for initial code download CHCL CLCX All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller [1] Min Typ Max ...
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... All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 Single-chip 16/32-bit microcontroller detail 0.75 1.45 1 0.2 0.12 0.1 0.45 1.05 EUROPEAN PROJECTION LPC2194 SOT314 θ (1) (1) θ 1. 1.05 0 ISSUE DATE 00-01-19 03-02-25 © NXP B.V. 2011. All rights reserved ...
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... Serial Peripheral Interface Static Random Access Memory Synchronous Serial Interface Synchronous Serial Port Transistor-Transistor Logic Universal Asynchronous Receiver/Transmitter All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller © NXP B.V. 2011. All rights reserved ...
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... Table 5 “Static 0.05V LPC2194 v.5 20071210 • Modifications: Type number LPC2194HBD64/01 has been added. • Details introduced with /01 devices on new peripherals/features (Fast I/O Ports, SSP, CRP) and enhancements to existing ones (UART0/1, Timers, ADC, and SPI) added. • Power consumption measurements for LPC2194/01 added. ...
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... Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from national authorities. All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller © NXP B.V. 2011. All rights reserved ...
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... Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners C-bus — logo is a trademark of NXP B.V. http://www.nxp.com salesaddresses@nxp.com All information provided in this document is subject to legal disclaimers. Rev. 6 — 14 June 2011 LPC2194 Single-chip 16/32-bit microcontroller © NXP B.V. 2011. All rights reserved ...
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... Power control . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.18.8 APB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 6.19 Emulation and debugging . . . . . . . . . . . . . . . 22 6.19.1 EmbeddedICE . . . . . . . . . . . . . . . . . . . . . . . . 22 6.19.2 Embedded trace macrocell . . . . . . . . . . . . . . 22 6.19.3 RealMonitor . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7 Limiting values . . . . . . . . . . . . . . . . . . . . . . . . 24 8 Static characteristics . . . . . . . . . . . . . . . . . . . 25 8.1 Power consumption measurements for LPC2194/ Dynamic characteristics 9.1 Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35 10 Package outline Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 37 12 Revision history . . . . . . . . . . . . . . . . . . . . . . . 38 13 Legal information . . . . . . . . . . . . . . . . . . . . . . 39 13.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 39 13.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 13 ...