JN5148 NXP Semiconductors, JN5148 Datasheet - Page 94

• Manufacturer Part Number: JN5148
• Description: The JN5148 is an ultra low power, high performance MCU combined with an IEEE802
• Manufacturer: NXP Semiconductors

B.4 JN5148 Module Reference Designs
For customers wishing to integrate the JN5148 device directly into their system, Jennic provide a range of Module
Reference Designs, covering standard and high-power modules fitted with different Antennae
To ensure the correct performance, it is strongly recommended that where possible the design details provided by the
reference designs, are used in their exact form for all end designs, this includes component values, pad dimensions,
track layouts etc. In order to minimise all risks, it is recommended that the entire layout of the appropriate reference
module, if possible, be replicated in the end design.
For full details, consult the Standard Module Reference Design JN-RD-6015 [6]. Please contact technical support via
the on-line tech-support system (www.nxp.com/jennic/support).
B.4.1 Schematic Diagram
A schematic diagram of the JN5148 PCB antenna reference module is shown in Figure 59. Details of component
values and PCB layout constraints can be found in Table 8.
94
UART1/JTAG
RXD1
C11 15pF
C10 15pF
Serial Port
Two Wire
Y1
Figure 60: JN5148 Printed Antenna Reference Module Schematic Diagram
VDD
Or Integrated Antenna
To Coaxial Socket
VCOTUNE (NC)
VB_SYNTH
XTAL_OUT
XTAL_IN
VB_VCO
DIO16
VSSS
CTS1
VSS3
RTS1
TXD1
VSS2
IBIAS
VDD1
L1 5.6nH
VB_RF
10
11
12
13
14
8
1
2
3
4
5
6
7
9
56
15
L2 2.7nH
C1 47pF
55
16
54
17
Timers
JN-DS-JN5148-001 1v7
53
18
52
19
20
51
JN5148
VB_RF
50
21
VSSA
49
22
VDD
48
23
47
24
46
25
45
26
44
27
43
28
42
41
40
33
32
31
30
29
39
38
37
36
35
34
Analogue IO
SPIMOSI
SPIMISO
SPICLK
SPISEL3
SPISEL2
RESETN
SPISEL1
SPISEL0
VB_RAM
VSS1
VB_DIG
RXD1
DAC2
DAC1
UART0/JTAG
C7 100nF
C6 100nF
© NXP Laboratories UK 2011
VDD
1
2
3
4
SD0
SS
WP
VSS
Memory
SPI Selects
Serial
Flash
HOLD
VCC
CLK
SDI
8
7
6
5
VDD
SPICLK
SPIMOSI