BUK9MRR-65PKK NXP Semiconductors, BUK9MRR-65PKK Datasheet - Page 12

Dual N-channel enhancement mode field-effect power transistor in SO20

BUK9MRR-65PKK

Manufacturer Part Number
BUK9MRR-65PKK
Description
Dual N-channel enhancement mode field-effect power transistor in SO20
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
BUK9MRR-65PKK
Product data sheet
Fig 19. Gate-source voltage as a function of turn-on
Fig 21. Source (diode forward) current as a function of source-drain (diode forward) voltage; typical values, FET1
V
(V)
GS
5
4
3
2
1
0
gate charge; typical values, FET1 and FET2
and FET2
0
2
V
DS
= 14 V
4
6
V
(A)
I
DS
S
50
40
30
20
10
= 52 V
0
0
8
All information provided in this document is subject to legal disclaimers.
003aae496
Q
G
(nC)
10
Rev. 02 — 17 June 2010
0.5
1
Fig 20. Input, output and reverse transfer capacitances
(pF)
C
10
10
10
10
1.5
4
3
2
10
as a function of drain-source voltage; typical
values, FET1 and FET2
-1
003a a d905
V
S D
Dual TrenchPLUS FET Logic Level FET
(V)
BUK9MRR-65PKK
2
1
10
© NXP B.V. 2010. All rights reserved.
V
DS
003a a d902
C
C
C
(V)
os s
rs s
is s
10
2
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