PSMN011-30YL NXP Semiconductors, PSMN011-30YL Datasheet - Page 8

Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology

PSMN011-30YL

Manufacturer Part Number
PSMN011-30YL
Description
Logic level N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package using TrenchMOS technology
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
PSMN011-30YL
Product data sheet
Fig 13. Normalized drain-source on-state resistance
Fig 15. Gate-source voltage as a function of gate
V
a
(V)
1.5
0.5
GS
10
2
1
0
8
6
4
2
0
−60
factor as a function of junction temperature
charge; typical values
T
0
j
= 25°C and I
0
6V
5
24V
D
= 45 A
60
10
120
15
V
DS
All information provided in this document is subject to legal disclaimers.
Q
003aaf442
= 15V
T
G
j
(nC)
( ° C)
03aa27
180
20
N-channel 10.7 mΩ 30 V TrenchMOS logic level FET in LFPAK
Rev. 2 — 17 May 2011
Fig 14. Gate charge waveform definitions
Fig 16. Input, output and reverse transfer capacitances
(pF)
C
10
10
10
3
2
10
as a function of drain-source voltage; typical
values
V
V
-1
GS
V
V
V
GS(pl)
DS
GS(th)
GS
= 0 V, f = 1 MHz
Q
GS1
1
I
Q
D
GS
PSMN011-30YL
Q
GS2
Q
G(tot)
Q
GD
10
© NXP B.V. 2011. All rights reserved.
V
C
DS
C
003aaa508
C
003aaf439
oss
rss
iss
(V)
10
2
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