PSMN1R1-25YLC NXP Semiconductors, PSMN1R1-25YLC Datasheet - Page 10
PSMN1R1-25YLC
Manufacturer Part Number
PSMN1R1-25YLC
Description
Logic level enhancement mode N-channel MOSFET in LFPAK package
Manufacturer
NXP Semiconductors
Datasheet
1.PSMN1R1-25YLC.pdf
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PSMN1R1-25YLC
Product data sheet
Fig 16. Input, output and reverse transfer capacitances
Fig 18. Reverse recovery timing definition
(pF)
C
10
10
10
4
3
2
10
as a function of drain-source voltage; typical
values
-1
1
10
(A)
I
D
0
C
C
C
os s
is s
rs s
V
All information provided in this document is subject to legal disclaimers.
003a a f 547
DS
(V)
10
2
Rev. 1 — 2 May 2011
N-channel 25 V 1.15 mΩ logic level MOSFET in LFPAK using
t
a
Fig 17. Source current as a function of source-drain
t
rr
(A)
I
100
S
80
60
40
20
t
b
0
voltage; typical values
0
I
RM
003a a f 444
0.25 I
t (s )
R M
T
0.3
j
= 150 ° C
PSMN1R1-25YLC
0.6
T
0.9
j
= 25 ° C
© NXP B.V. 2011. All rights reserved.
003a a f 550
V
S D
(V)
1.2
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