STM32W108CZ STMicroelectronics, STM32W108CZ Datasheet - Page 157

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STM32W108CZ

Manufacturer Part Number
STM32W108CZ
Description
High-performance, IEEE 802.15.4 wireless system-on-chip with embedded Flash memory
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM32W108CZ

Receive Current (w/ Cpu)
27 mA
Transmit Current (w/ Cpu, +3 Dbm Tx)
31 mA
Low Deep Sleep Current, With Retained Ram And Gpio
400 nA/800 nA with/without sleep timer
Standard Arm Debug Capabilities
Flash patch & breakpoint; data watchpoint & trace; instrumentation trace macrocell
Single Voltage Operation
2.1-3.6 V with internal 1.8 V and 1.25 V regulators

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STM32W108HB STM32W108CC STM32W108CB STM32W108CZ
10.3.5
Table 92.
31
15
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30
14
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TIM_IC2F
TIM_OC2M
Timer x capture/compare mode register 1 (TIMx_CCMR1)
Address offset: 0xE018 (TIM1) and 0xF018 (TIM2)
Reset value:
Timer x capture/compare mode register 1 (TIMx_CCMR1)
Timer channels can be programmed as inputs (capture mode) or outputs (compare mode).
The direction of channel y is defined by TIM_CCyS in this register.
The other bits in this register have different functions in input and in output modes. The
TIM_OC* fields only apply to a channel configured as an output (TIM_CCyS = 0), and the
TIM_IC* fields only apply to a channel configured as an input (TIM_CCyS > 0).
Bit 2 TIM_CC2G: Capture/Compare 2 Generation
Bit 1 TIM_CC1G: Capture/Compare 1 Generation
Bit 0 TIM_UG: Update Generation
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13
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0: Does nothing.
1: If CC2 configured as output channel:
The TIM_CC2IF flag is set.
If CC2 configured as input channel:
The TIM_CC2IF flag is set.
The INT_TIMMISSCC2IF flag is set if the TIM_CC2IF flag was already high.
The current value of the counter is captured in TMRx_CCR2 register.
0: Does nothing.
1: If CC1 configured as output channel:
The TIM_CC1IF flag is set.
If CC1 configured as input channel:
The TIM_CC1IF flag is set.
The INT_TIMMISSCC1IF flag is set if the TIM_CC1IF flag was already high.
The current value of the counter is captured in TMRx_CCR1 register.
0: Does nothing.
1: Re-initializes the counter and generates an update of the registers. This also clears the
prescaler counter but the prescaler ratio is not affected. The counter is cleared if center-aligned
mode is selected or if TIM_DIR=0 (up-counting), otherwise it takes the auto-reload value
(TMR1_ARR) if TIM_DIR=1 (down-counting).
28
12
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TIM_O
C2BE
TIM_IC2PSC
27
11
rw
0x0000 0000
TIM_O
C2FE
26
10
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25
TIM_CC2S
9
Doc ID 16252 Rev 13
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24
8
Reserved
23
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7
22
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6
TIM_IC1F
TIM_OC1M
21
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5
20
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4
General-purpose timers
TIM_O
C1BE
TIM_IC1PSC
19
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3
TIM_O
C1FE
18
rw
2
17
TIM_CC1S
1
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16
0

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