STM8S903K3 STMicroelectronics, STM8S903K3 Datasheet - Page 6

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STM8S903K3

Manufacturer Part Number
STM8S903K3
Description
16 MHz STM8S 8-bit MCU, up to 8 Kbytes Flash, 1 Kbyte RAM, 640 bytes EEPROM
Manufacturer
STMicroelectronics
Datasheet

Specifications of STM8S903K3

Program Memory
8 Kbytes Flash; data retention 20 years at 55 °C after 10 kcycles
Data Memory
640 bytes true data EEPROM; endurance 300 kcycles
Ram
1 Kbytes
Advanced Control Timer
16-bit, 4 CAPCOM channels, 3 complementary outputs, dead-time insertion and flexible synchronization

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List of figures
List of figures
Figure 1. Block diagram .........................................................................................................................10
Figure 2. Flash memory organization ....................................................................................................13
Figure 3. STM8S903F3 TSSOP20/SO20 pinout ...................................................................................24
Figure 4. STM8S903F3 UFQFPN20 pinout ...........................................................................................24
Figure 5. STM8S903K3 UFQFPN32/LQFP32 pinout ............................................................................24
Figure 6. STM8S903K3 SDIP32 pinout .................................................................................................25
Figure 7. Memory map ...........................................................................................................................28
Figure 8. Pin loading conditions .............................................................................................................51
Figure 9. Pin input voltage .....................................................................................................................52
Figure 10. f
Figure 11. External capacitor C
Figure 12. Typ I
Figure 13. Typ I
Figure 14. Typ I
Figure 15. Typ I
Figure 16. Typ I
Figure 17. Typ I
Figure 18. HSE external clocksource .....................................................................................................66
Figure 19. HSE oscillator circuit diagram ...............................................................................................67
Figure 20. Typical HSI frequency variation vs V
Figure 21. Typical LSI frequency variation vs V
Figure 22. Typical V
Figure 23. Typical pull-up resistance vs V
Figure 24. Typical pull-up current vs V
Figure 25. Typ. V
Figure 26. Typ. V
Figure 27. Typ. V
Figure 28. Typ. V
Figure 29. Typ. V
Figure 30. Typ. V
Figure 31. Typ. V
Figure 32. Typ. V
Figure 33. Typ. V
Figure 34. Typ. V
Figure 35. Typical NRST V
Figure 36. Typical NRST pull-up resistance vs V
Figure 37. Typical NRST pull-up current vs V
Figure 38. Recommended reset pin protection ......................................................................................81
Figure 39. SPI timing diagram - slave mode and CPHA = 0 ..................................................................83
Figure 40. SPI timing diagram - slave mode and CPHA = 1 ..................................................................83
Figure 41. SPI timing diagram - master mode
Figure 42. Typical application with I
Figure 43. ADC accuracy characteristics ...............................................................................................88
Figure 44. Typical application with ADC ................................................................................................88
Figure 45. 32-pin low profile quad flat package (7 x 7) ..........................................................................92
Figure 46. 32-lead, ultra thin, fine pitch quad flat no-lead package (5 x 5) ............................................94
Figure 47. 20-lead, ultra thin, fine pitch quad flat no-lead package outline (3 x 3) ................................95
6/115
CPUmax
DD(RUN)
DD(RUN)
DD(RUN)
DD(WFI)
DD(WFI)
DD(WFI)
OL
OL
OL
OL
OL
OL
DD
DD
DD
DD
versus V
IL
@ V
@ V
@ V
@ V
@ V
@ V
- V
- V
- V
- V
and V
vs. V
vs. f
vs. V
OH
OH
OH
OH
vs. V
vs. f
vs. V
DD
DD
DD
DD
DD
DD
@ V
@ V
@ V
@ V
IL
CPU
= 5 V (true open drain ports) ......................................................................75
= 3.3 V (true open drain ports) ...................................................................76
= 5 V (high sink ports) ................................................................................76
= 3.3 V (high sink ports) .............................................................................77
CPU
= 5 V (standard ports) ................................................................................74
= 3.3 V (standard ports) .............................................................................75
DD
DD
IH
DD
DD
DD
and V
DD
DD
vs V
DD
DD
HSE user external clock, f
HSI RC osc, f
EXT
HSE user external clock, V
HSE user external clock, f
HSI RC osc, f
HSE user external clock, V
..............................................................................................................55
= 5 V (high sink ports) .......................................................................78
= 3.3 V (high sink ports) ....................................................................79
= 5 V (standard ports) .......................................................................77
= 3.3 V (standard ports) ...................................................................78
DD
IH
2
C bus and timing diagram ............................................................85
.......................................................................................................56
vs V
@ 4 temperatures ......................................................................72
DD
@ 4 temperatures .................................................................73
DD
DD
DocID15590 Rev 6
@ 4 temperatures ............................................................72
@ 4 temperatures ...........................................................80
DD
CPU
(1)
CPU
DD
DD
DD
@ 4 temperatures ......................................................81
= 16 MHz .................................................................65
= 16 MHz .................................................................64
...................................................................................84
@ 4 temperatures ...................................................69
@ 4 temperatures ..................................................69
@ 4 temperatures .................................................80
CPU
CPU
DD
DD
= 16 MHz ..............................................65
= 5 V .....................................................65
= 16 MHz .............................................63
= 5 V ....................................................64
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