ST72324LK2 STMicroelectronics, ST72324LK2 Datasheet - Page 140

• Manufacturer Part Number: ST72324LK2
• Description: 3V RANGE 8-BIT MCU WITH 8 TO 32K FLASH/ROM, 10-BIT ADC, 4 TIMERS, SPI, SCI INTERFACE
• Manufacturer: STMicroelectronics

Specifications of ST72324LK2

• Hdflash Endurance: 100 cycles, data retention
• Clock Sources: crystal/ceramic resonator oscillators, internal RC oscillator, and bypass for external clock
• Four Power Saving Modes: Halt, Active-Halt, Wait and Slow
• Main Clock Controller With: Real time base, Beep and Clock-out capabilities
• 16-bit Timer A With: 1 input capture, 1 output compare, external clock input, PWM and pulse generator modes
• 16-bit Timer B With: 2 input captures, 2 output compares, PWM and pulse generator modes

ST72324Lxx
14 DEVICE CONFIGURATION AND ORDERING INFORMATION
Each device is available for production in user pro-
grammable versions (FLASH) as well as in factory
coded versions (ROM). ST72324BL devices are
ROM versions. ST72P324L devices are Factory
Advanced Service Technique ROM (FASTROM)
versions: they are factory-programmed HDFlash
14.1 FLASH OPTION BYTES
The option bytes allows the hardware configura-
tion of the microcontroller to be selected. They
have no address in the memory map and can be
accessed only in programming mode (for example
using a standard ST7 programming tool). The de-
fault content of the FLASH is fixed to FFh. To pro-
gram directly the FLASH devices using ICP,
FLASH devices are shipped to customers with the
internal RC clock source. In masked ROM devic-
es, the option bytes are fixed in hardware by the
ROM code (see option list).
OPTION BYTE 0
OPT7= WDG HALT Watchdog reset on HALT
This option bit determines if a RESET is generated
when entering HALT mode while the Watchdog is
active.
0: No Reset generation when entering Halt mode
1: Reset generation when entering Halt mode
OPT6= WDG SW Hardware or software watchdog
This option bit selects the watchdog type.
0: Hardware (watchdog always enabled)
1: Software (watchdog to be enabled by software)
140/154
1
Default
7
1
WDG
1
STATIC OPTION BYTE 0
1
1
1
VD
0
1
1
1
1
0
devices. FLASH devices are shipped to customers
with a default content (FFh), while ROM factory
coded parts contain the code supplied by the cus-
tomer. This implies that FLASH devices have to be
configured by the customer using the Option Bytes
while the ROM devices are factory-configured.
OPT5 = CSS Clock security system on/off
Reserved in current silicon revision, must be kept
at default value.
OPT4:3= VD[1:0] Voltage detection
Reserved, must be kept at default value.
OPT2:1 = Reserved, must be kept at default value.
OPT0= FMP_R Flash memory read-out protection
Read-out protection, when selected, provides a
protection against Program Memory content ex-
traction and against write access to Flash memo-
ry.
Erasing the option bytes when the FMP_R option
is selected causes the whole user memory to be
erased first, and the device can be reprogrammed.
Refer to Section 7.3.1 on page 37 and the ST7
Flash Programming Reference Manual for more
details.
0: Read-out protection enabled
1: Read-out protection disabled
1
7
1
STATIC OPTION BYTE 1
OSCTYPE
1
1
0
0
2
1
OSCRANGE
1
1
0
1
0
1