ST92250CV2Q-Auto STMicroelectronics, ST92250CV2Q-Auto Datasheet - Page 196
ST92250CV2Q-Auto
Manufacturer Part Number
ST92250CV2Q-Auto
Description
8-bit MCU for automotive
Manufacturer
STMicroelectronics
Datasheet
1.ST92150JDV1QAUTO.pdf
(430 pages)
Specifications of ST92250CV2Q-Auto
Internal Memory
Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 TM (Emulated EEPROM)
Minimum Instruction Time
83 ns (24 MHz int. clock)
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ST92124xxx-Auto/150xxxxx-Auto/250xxxx-Auto
MULTIFUNCTION TIMER (Cont’d)
10.4.3.13 Autodiscrimination Mode
The phase between two pulses (respectively on in-
put pin B and input pin A) generates a one step up
(or down) count, so that the up/down control and
the counter clock are both external. Thus, if the ris-
ing edge of TxINB arrives when TxINA is at a low
level, the timer is incremented (no action if the ris-
ing edge of TxINB arrives when TxINA is at a high
level). If the falling edge of TxINB arrives when
TxINA is at a low level, the timer is decremented
(no action if the falling edge of TxINB arrives when
TxINA is at a high level).
Setting the UDC bit in the TCR register has no ef-
fect in this configuration.
10.4.3.14 TxINA = Trigger - TxINB = Ext. Clock
The signal applied to input pin A acts as a trigger
signal on REG0R, initiating the action for which the
register was programmed (i.e. a reload or cap-
196/430
9
ture), while the signal applied to input pin B is used
as the clock for the prescaler.
(*) The timer is in One shot mode and REG0R in
reload mode
10.4.3.15 TxINA = Ext. Clock - TxINB = Trigger
The signal applied to input pin B acts as a trigger,
performing a capture on REG1R, while the signal
applied to input pin A is used as the clock for the
prescaler.
10.4.3.16 TxINA = Trigger - TxINB = Gate
The signal applied to input pin A acts as a trigger
signal on REG0R, initiating the action for which the
register was programmed (i.e. a reload or cap-
ture), while the signal applied to input pin B acts as
a gate signal for the internal clock (i.e. the counter
runs only when the gate signal is at a low level).
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