ST92F150CV1 STMicroelectronics, ST92F150CV1 Datasheet - Page 46

• Manufacturer Part Number: ST92F150CV1
• Description: 8-bit MCU
• Manufacturer: STMicroelectronics

Specifications of ST92F150CV1

• Internal Memory: Single Voltage FLASH up to 256 Kbytes, RAM up to 8Kbytes, 1K byte E3 (Emulated EEPROM)
• Minimum Instruction Time: 83 ns (24 MHz int. clock)

ST92F124/F150/F250 - DEVICE ARCHITECTURE
MMU REGISTERS (Cont’d)
DATA PAGE REGISTER 0 (DPR0)
R240 - Read/Write
Register Page: 21
Reset value: undefined
This register is relocated to R224 if EMR2.5 is set.
Bits 7:0 = DPR0_[7:0]: These bits define the 16-
Kbyte Data Memory page number. They are used
as the most significant address bits (A21-14) to ex-
tend the address during a Data Memory access.
The DPR0 register is used when addressing the
virtual address range 0000h-3FFFh.
DATA PAGE REGISTER 1 (DPR1)
R241 - Read/Write
Register Page: 21
Reset value: undefined
This register is relocated to R225 if EMR2.5 is set.
Bits 7:0 = DPR1_[7:0]: These bits define the 16-
Kbyte Data Memory page number. They are used
as the most significant address bits (A21-14) to ex-
tend the address during a Data Memory access.
The DPR1 register is used when addressing the
virtual address range 4000h-7FFFh.
46/429
9
DPR0
DPR1
_7
_7
7
7
DPR0
DPR1
_6
_6
DPR0
DPR1
_5
_5
DPR0
DPR1
_4
_4
DPR0
DPR1
_3
_3
DPR0
DPR1
_2
_2
DPR0
DPR1
_1
_1
DPR0
DPR1
_0
_0
0
0
DATA PAGE REGISTER 2 (DPR2)
R242 - Read/Write
Register Page: 21
Reset value: undefined
This register is relocated to R226 if EMR2.5 is set.
Bits 7:0 = DPR2_[7:0]: These bits define the 16-
Kbyte Data memory page. They are used as the
most significant address bits (A21-14) to extend
the address during a Data memory access. The
DPR2 register is involved when the virtual address
is in the range 8000h-BFFFh.
DATA PAGE REGISTER 3 (DPR3)
R243 - Read/Write
Register Page: 21
Reset value: undefined
This register is relocated to R227 if EMR2.5 is set.
Bits 7:0 = DPR3_[7:0]: These bits define the 16-
Kbyte Data memory page. They are used as the
most significant address bits (A21-14) to extend
the address during a Data memory access. The
DPR3 register is involved when the virtual address
is in the range C000h-FFFFh.
DPR2
DPR3
_7
_7
7
7
DPR2
DPR3
_6
_6
DPR2
DPR3
_5
_5
DPR2
DPR3
_4
_4
DPR2
DPR3
_3
_3
DPR2
DPR3
_2
_2
DPR2
DPR3
_1
_1
DPR2
DPR3
_0
_0
0
0