LMH1983SQ/NOPB National Semiconductor, LMH1983SQ/NOPB Datasheet - Page 12

• Manufacturer Part Number: LMH1983SQ/NOPB
• Description: IC VID CLK GEN MULTI RATE 40LLP
• Manufacturer: National Semiconductor
• Type: Clock Generatorr

Specifications of LMH1983SQ/NOPB

• Applications: Video Equipment
• Mounting Type: Surface Mount
• Package / Case: 40-LLP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

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ADD
0x05
0x06
0x07
0x08
Name
Device Control
Input Polarity
Output Mode – PLL2
Format
Output Mode – PLL3
Format
Bits
7
6
5
4:3
2
1
0
7:4
3
2
1
0
7:6
5:0
7:6
5:0
Field
Soft_Reset
Powerdown
EN_AFD
PLL1_Mode
LOR Mode
Force_148
GOE
RSVD
EN_AUTOPOL
HIN_POL_OVR
VIN_POL_OVR
FIN_POL_OVR
RSVD
PLL2_Format
RSVD
PLL3_Format
12
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Default
0
0
1
01
0
1
1
1
0
0
0
001110
001101
Description
Writing a ‘1’ will reset all registers to their
default values. This bit is self-clearing and
always returns ‘0’ when read.
Controls the power down function.
Enables Auto Format Detection (AFD).
0 = Auto Format Detect disabled
1 = Auto Format Detect enabled
Sets PLL1 operating mode:
00 = Force Free-run
01 = Genlock
10 = Force Holdover
11 = Reserved
Sets default mode of operation on Loss of
Reference (LOR) condition:
0 = Holdover on LOR
1 = Free-run on LOR
When this bit is set, it forces the PLL2 and
PLL3 clock rates to 148.xx MHz regardless of
chosen output format. Otherwise, the native
clock rate of the chosen output format will be
used.
0 = Uses the native clock rates
1 = Forces PLL2 = 148.5 MHz and PLL3 =
148.35 MHz clock rate
Global Output Enable
0 = Disables all CLKout and Fout output
buffers (Hi-Z)
1 = Enable active outputs
Reserved
Enables Auto Polarity Detection and
Correction. The proper polarity needs to be
set to synchronize the output timing signals
to the leading edges of the H and V inputs.
0 = The polarities of HVF inputs are manually
set by their respective polarity override
registers.
1 = The polarity of the H input is auto-
detected. The polarity correction applied to
the H input will also be applied to V and F
inputs.
Used to manually set the H input Polarity.
0 = Active Low (Negative polarity)
1 = Active High (Positive polarity)
Used to manually set the V input Polarity.
0 = Active Low (Negative polarity)
1 = Active High (Positive polarity)
Used to manually set the F input Polarity.
0 = Active Low (Negative polarity)
1 = Active High (Positive polarity)
Reserved
Sets the video format output timing for PLL2.
Reserved
Sets the video format output timing for PLL3.