LMH1983SQ/NOPB National Semiconductor, LMH1983SQ/NOPB Datasheet - Page 34
LMH1983SQ/NOPB
Manufacturer Part Number
LMH1983SQ/NOPB
Description
IC VID CLK GEN MULTI RATE 40LLP
Manufacturer
National Semiconductor
Type
Clock Generatorr
Datasheet
1.LMH1983SQENOPB.pdf
(38 pages)
Specifications of LMH1983SQ/NOPB
Applications
Video Equipment
Mounting Type
Surface Mount
Package / Case
40-LLP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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One potential source of jitter on a multiple clock system such
as the LMH1983 is interference between the four PLLs on the
chip. To help reduce this effect, internally on the LMH1983
each PLL is run from a separate power supply, and each sup-
ply has its own internal regulator. These regulators each
require their own external bypass as seen in the Typical In-
terface Circuit with bypass capacitors.
An I
LMH1983. The LMH1983 will have one of three I
2
C bus is also connected from the control system to the
3G, 3G/1.001, and Audio Clock Generation for SD to HD SDI Upconversion with audio embed/disembed
A/V Clock Generation using a Recognized Clock-based Input reference
2
C address-
34
es, selected by the state of the ADDR pin, which may be tied
high, tied low or left open. Depending on the configuration of
the control bus, it may require a pull-up resistor on the SDA
and SCK pins.
Typical Application Block Diagrams
Three typical applications are shown below for the LMH1983
illustrating different input and output options.
30085141
30085140