TMP86xy08I/S/DMG/NG Toshiba, TMP86xy08I/S/DMG/NG Datasheet - Page 120

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TMP86xy08I/S/DMG/NG

Manufacturer Part Number
TMP86xy08I/S/DMG/NG
Description
Manufacturer
Toshiba
Datasheet

Specifications of TMP86xy08I/S/DMG/NG

Package
SSOP30/SDIP30
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
4/8
Ram Size
256/256
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
-
High-speed Serial Output
-
Adc 8-bit Channels
6
Adc 10-bit Channels
-
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4.5 to 5.5
TDBUF
TXD pin
UARTSR<TBEP>
INTTXD interrupt
Shift register
10.9.6 Transmit End Flag
TXD pin
UARTSR<TBEP>
UARTSR<TEND>
INTTXD interrupt
Shift register
Figure 10-10 Generation of Transmit End Flag and Transmit Data Buffer Empty
UARTSR<TEND> is set to “1”. The UARTSR<TEND> is cleared to “0” when the data transmit is started after
writing the TDBUF.
When data are transmitted and no data is in TDBUF (UARTSR<TBEP> = “1”), transmit end flag
***** 1
xxxx
Figure 10-9 Generation of Transmit Data Buffer Empty
***
1xx
1xxxx0
Start
****
Data write
* 1xxxx
1x
Bit 0
yyyy
***** 1
Stop
Page 109
Data write for TDBUF
Final bit
**** 1x
***** 1
Stop
After reading UARTSR writing TDBUF
clears TBEP.
1yyyy0
1yyyy0
Start
TMP86C808DMG
zzzz
Data write
* 1yyyy
Bit 0

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