TMP86xy08I/S/DMG/NG Toshiba, TMP86xy08I/S/DMG/NG Datasheet - Page 135
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TMP86xy08I/S/DMG/NG
Manufacturer Part Number
TMP86xy08I/S/DMG/NG
Description
Manufacturer
Toshiba
Datasheet
1.TMP86XY08ISDMGNG.pdf
(153 pages)
Specifications of TMP86xy08I/S/DMG/NG
Package
SSOP30/SDIP30
Rom Types (m=mask,p=otp,f=flash)
M/P/F
Rom Size
4/8
Ram Size
256/256
Driver Led
8
Driver Lcd
-
Spi/sio Channels
1
Uart/sio Channels
1
I2c/sio Channels
-
High-speed Serial Output
-
Adc 8-bit Channels
6
Adc 10-bit Channels
-
Da Converter Channels
-
Timer Counter 18-bit Channel
-
Timer Counter 16-bit Channel
1
Timer Counter 8-bit Channel
2
Motor Channels
-
Watchdog Timer
Y
Dual Clock
Y
Clock Gear
-
Number Of I/o Ports
24
Power Supply (v)
4.5 to 5.5
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12.3 Function
12.3 Function
12.3.1 AD Conveter Operation
12.3.2 AD Converter Operation
ADCCR1<ADRS>
ADCDR2<ADBF>
ADCDR1 status
ADCDR2<EOCF>
INTADC interrupt
Reading ADCDR1
Reading ADCDR2
ADCCR1<SAIN> is thereby started.
(ADCDR1) and at the same time ADCDR2<EOCF> is set to “1”, the AD conversion finished interrupt
(INTADC) is generated.
newly again (restart) during AD conversion. Before setting ADRS newly again, check ADCDR<EOCF> to see
that the conversion is completed or wait until the interrupt signal (INTADC) is generated (e.g., interrupt han-
dling routine).
When ADCCR1<ADRS> is set to "1", AD conversion of the voltage at the analog input pin specified by
After completion of the AD conversion, the conversion result is stored in AD converted value registers
ADCCR1<ADRS> is automatically cleared after AD conversion has started. Do not set ADCCR1<ADRS>
1. Set up the AD converter control register 1 (ADCCR1) as follows:
2. Set up the AD converter control register 2 (ADCCR2) as follows:
3. After setting up 1. and 2. above, set AD conversion start (ADRS) of AD converter control register 1
4. After an elapse of the specified AD conversion time, the AD converted value is stored in AD con-
5. EOCF is cleared to “0” by a read of the conversion result. However, if reconverted before a register
(ADCCR1) to “1”.
verted value register 1 (ADCDR1) and the AD conversion finished flag (EOCF) of AD converted
value register 2 (ADCDR2) is set to “1”, upon which time AD conversion interrupt INTADC is gener-
ated.
read, although EOCF is cleared the previous conversion result is retained until the next conversion is
completed.
• Choose the channel to AD convert using AD input channel select (SAIN).
• Specify analog input enable for analog input control (AINDS).
• Set the AD conversion time using AD conversion time (ACK). For details on how to set the con-
• Choose IREFON for DA converter control.
version time, refer to Table 12-1.
Indeterminate
AD conversion start
Figure 12-2 AD Converter Operation
First conversion result
Conversion
result read
Page 124
AD conversion start
Second conversion result
EOCF cleared by reading
conversion result
Conversion
result read
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