SAB C165-LM Infineon Technologies, SAB C165-LM Datasheet - Page 52

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SAB C165-LM

Manufacturer Part Number
SAB C165-LM
Description
Manufacturer
Infineon Technologies
Datasheet

Specifications of SAB C165-LM

Packages
PG-MQFP-100
Max Clock Frequency
20.0 MHz
Sram (incl. Cache)
2.0 KByte
Program Memory
0.0 KByte
AC Characteristics
Multiplexed Bus (Reduced Supply Voltage Range)
(Operating Conditions apply)
ALE cycle time = 6 TCL + 2
Parameter
ALE high time
Address setup to ALE
Address hold after ALE
ALE falling edge to RD,
WR (with RW-delay)
ALE falling edge to RD,
WR (no RW-delay)
Address float after RD,
WR (with RW-delay)
Address float after RD,
WR (no RW-delay)
RD, WR low time
(with RW-delay)
RD, WR low time
RD to valid data in
RD to valid data in
ALE low to valid data in
Address to valid data in
Data hold after RD
rising edge
Data Sheet
(no RW-delay)
(with RW-delay)
(no RW-delay)
t
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
t
t
A
5
6
7
8
9
10
11
12
13
14
15
16
17
18
+
t
CC 11 +
CC 5 +
CC 15 +
CC 15 +
CC - 10 +
CC –
CC –
CC 34 +
CC 59 +
SR –
SR –
SR –
SR –
SR 0
C
+
t
F
min.
Max. CPU Clock
(150 ns at 20 MHz CPU clock without waitstates)
t
= 20 MHz
A
t
t
t
t
t
48
A
A
A
C
C
t
A
max.
6
31
22 +
47 +
45 +
+
57 + 2
+
t
t
C
C
t
t
t
C
C
A
t
A
1 / 2TCL = 1 to 20 MHz
min.
TCL - 14
+
TCL - 20
+
TCL - 10
+
TCL - 10
+
-10 +
2TCL - 16
+
3TCL - 16
+
0
Variable CPU Clock
t
t
t
t
t
t
C
A
A
A
A
C
t
A
max.
2TCL - 28
3TCL - 28
3TCL - 30
4TCL - 43
6
TCL + 6
+
+
+
+ 2
t
t
t
C
C
A
t
A
+
V2.0, 2000-12
+
t
C
t
C
C165
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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