MSC8101ADS Freescale Semiconductor / Motorola, MSC8101ADS Datasheet - Page 57

• Manufacturer Part Number: MSC8101ADS
• Description: MSC8101 APP DEV SYSTEM
• Manufacturer: Freescale Semiconductor / Motorola

2.6.5.2 DMA Data Transfers
Table 2-18 describes the DMA signal timing.
The DREQ
To achieve fast response, a synchronized peripheral should assert
Figure 2-11 shows synchronous peripheral interaction.
Freescale Semiconductor
Number
72
73
74
75
76
signal is synchronized with the falling edge of
DREQ set-up time before DLLIN falling edge
DREQ hold time after DLLIN falling edge
DONE set-up time before DLLIN rising edge
DONE hold time after DLLIN rising edge
DACK/DRACK/DONE delay after DLLIN rising edge
DACK/DONE/DRACK Outputs
Characteristic
DONE Input
MSC8101 Technical Data, Rev. 19
Figure 2-11.
Table 2-18.
DLLIN
DREQ
74
DLLIN
DMA Signals
DMA Signals
.
DONE
DREQ
timing is relative to the rising edge of
76
72
according to the timings in Table 2-18.
75
Minimum
0.5
0.5
0.5
6
9
73
Maximum
—
—
—
—
9
AC Timings
Units
DLLIN
ns
ns
ns
ns
ns
2-17
.