A43L0616AV-5 AMIC Technology, Corp., A43L0616AV-5 Datasheet - Page 31

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A43L0616AV-5

Manufacturer Part Number
A43L0616AV-5
Description
5ns 200MHz/CL=3 143MHz/CL=2 512K x 16-Bit x 2banks synchronous DRAM
Manufacturer
AMIC Technology, Corp.
Datasheet
CLOCK
A10/AP
ADDR
(May, 2001, Version 1.0)
Read & Write Cycle with Auto Precharge I @Burst Length=4
(CL=2)
(CL=3)
RAS
CAS
CKE
DQM
CS
DQ
DQ
BA
WE
0
Row Active
(A-Bank)
*Note : tRCD should be controlled to meet minimum tRAS before internal precharge start.
RAa
RAa
1
(In the case of Burst Length=1 & 2, BRSW mode)
2
3
Row Active
(B-Bank)
RBb
RBb
4
Auto Precharge
Read with
(A-Bank)
CAa
5
6
QAa0 QAa1
7
QAa0
Auto Precharge
8
Start Point
(A-Bank)
QAa2
QAa1
9
High
QAa2
30
QAa3
10
QAa3
11
Auto Precharge
12
Write with
(B-Bank)
DBb0 DBb1 DBb2 DBb3
DBb0
CBb
13
DBb1 DBb2 DBb3
14
AMIC Technology, Inc.
15
16
Auto Precharge
17
A43L0616A
Start Point
(B-Bank)
: Don't care
18
19

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