CS6150 Amphion Semiconductor Ltd., CS6150 Datasheet

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CS6150

Manufacturer Part Number
CS6150
Description
Motion JPEG Decoder
Manufacturer
Amphion Semiconductor Ltd.
Datasheet
1) Performance is dependent on the silicon process and libraries selected. 125 MHz operation is representative of 0.18-micron silicon using standard cells.
2) 30 frame/sec, 24-bit color images with three components in 4:2:0 format.
The CS6150 Motion JPEG (M-JPEG) Decoder is a highly integrated virtual component solution for leading-
edge image decompression applications. Its high performance is capable of sustaining data rates of over 125
mega-samples/sec
the baseline JPEG standard, the CS6150 delivers the optimal performance and low cost that only an applica-
tion specific virtual component (ASVC) can provide, making it the ideal solution for video conferencing and
office automation equipment. When used in conjunction with the companion CS6100 JPEG encoder, the
CS6150 provides the heart of a high performance video storage or broadcast system. The CS6150 is avail-
able in both ASIC and programmable logic versions that have been handcrafted by Amphion to deliver high
performance with low-power and minimal silicon area.
N
N
N
N
- Sustained 125 Msamples/second decoding
- Single sample per clock cycle processing
- Zero standby power
- Fully synchronous operation
- Supports interleaved and non-interleaved scans
- Supports image sizes to 64k by 64k
- Support for 4 user-defined Huffman tables and
High Performance
Low Power
Fully Compliant with Baseline JPEG
Autonomous Operation
- Simple FIFO-like interface for JPEG decoding
- No microprocessor control or pre-processing
- Decodes quantization and Huffman tables and
Standard ISO/IEC 10918–1/2
capability
4 programmable quantization tables
stream input
required
parameter information from JPEG bitstream
M o t i o n J P E G D e c o d e r
DECODER FEATURES
Figure 1: CS6150 Overview Diagram
C S 6 1 5 0
Stream
JPEG
Input
1
– delivering full motion, full color video images up to 2 megapixels
Stream
Parser
JPEG
CS6150
Configuration & Control Interface
Run Length
& Variable
Decoder
Length
Quantization
N
N
N
N
N
N
N
N
Inverse
High performance, low cost document processing
Ease of Integration
- Tapeout-Ready
- Simple core interface for easy integration into
Logic:
Memory:
Maximum Frequency:
Die Area:
Interactive Video
- Full duplex, high performance videoconferencing
- Photo printers
- Digital copiers
- Multifunction printers
Remote Video
- Surveillance system
larger systems
when used with companion CS6100 JPEG encoder
72k gates
9.6 kbits RAM
1.3 mm
APPLICATIONS
KEY METRICS
Frequency
Transform
Virtual Components for the Converging World
Inverse
TM
(iDCT)
2
firm-IP targeted netlist
125 MHz
Image
Data
2
. Fully compliant with
1

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CS6150 Summary of contents

Page 1

... When used in conjunction with the companion CS6100 JPEG encoder, the CS6150 provides the heart of a high performance video storage or broadcast system. The CS6150 is avail- able in both ASIC and programmable logic versions that have been handcrafted by Amphion to deliver high performance with low-power and minimal silicon area ...

Page 2

... JPEG decoder suitable for a wide range of imaging applications. Designed for continu- ous data flow – one image sample per clock cycle – the CS6150 can address the most demanding frame-based video decompres- sion applications. In addition, fully synchronous operation and zero-power standby make it ideal for low power applications. ...

Page 3

... JPEG Variable Length JPEG Data Stream Stream Parser (RLD) & (HUFF) (JSP) HTMem Figure 2: CS6150 JPEG Decoder Block Diagram Figure 3: CS6150 Symbol CS6150 DIAGRAM Code Control Decoder ZZMem Coefficient Dequantization (DT) Run Length Multiplier Decoder QTMem Huffman Decoder CS6150 SYMBOL & PIN ...

Page 4

... JpgInStrb 1 Input JPEG data input strobe JPEG Input Ready JpgInRdy 1 Output Indicates that the CS6150 is ready to accept JPEG input data DECODING MASKED JPEG OUTPUT PORT JPEG Mask JpgMask 5 Input DecJpg output configuration port Decoded JPEG Next Informs core to place next 8-bit word of masked JPEG output data onto DecJpg. ...

Page 5

... Table 2: Memory Block Size Information STATE DESCRIPTIONS DESCRIPTION The major operating modes and states of the CS6150 are shown in Figure 4. Figure 4: CS6150 Decoder States PORTS Following the assertion of the reset signal (RSTn) the core enters the Initialization state for 384 clock cycles. ...

Page 6

... Loading of the compressed JPEG input image data is per- formed using the JpgIn interface. The data stream is input to CS6150 via the JpgIn[7:0] port. This stream must also be accompanied by a data valid signal, JpgInStrb, which must be asserted coincident with all valid samples. The data inter- ...

Page 7

... Figure 6: Pixel Data Output Interface Timing DECODED JPEG HEADERS OUTPUT PORT Image marker data is output from CS6150 via the DecJpg[7:0] port and is accompanied by a DecJpgAvail signal when valid data is output on the DecJpg port. The contents of the output ...

Page 8

... CS6150 PARAMETER DATA OUTPUT PORT The PValue[15:0] output port enables the various parameters extracted from the input JPEG data stream and currently used by the core to be read. The data available on the PValue port is for information only and does not contain control sig- nals for the decoder core ...

Page 9

... The data available on the PValue port does not contain con- trol signals used by the CS6150. Many of the values however can be used to control other logic instantiated around the CS6150, i.e. the FX and FY parameters (PType 0x0 and 0x1) could be used to control a raster to block converter. 9 ...

Page 10

... CS6150 PTYPE PVALUE OUTPUT (Decimal {bit position [15:0]} Value) 0 FY[15:0 FX[15: 00_YMCU[13:0] YMCU 3 00_XMCU[13:0] XMCU 4 Cs0[7:0]_ Cs0 Tq0[1:0]_ Tq0 V0[2:0]_ V0 H0[2:0] H0 Cs1[7:0]_ Cs1 5 Tq1[1:0]_ Tq1 V1[2:0]_ V1 H1[2: Cs2[7:0]_ Cs2 Tq2[1:0]_ Tq2 V2[2:0]_ V2 H2[2: Cs3[7:0]_ Cs3 Tq3[1:0]_ Tq3 ...

Page 11

... Most inputs and outputs to the CS6150 are registered and fully synchronous. Full pin descriptions and conditional timing behavior for non-registered pins is given in the CS6150 databook. Example timing characteristics for the CS6150 are given in Table 7. Timing characteristics are technology dependent and will vary by instantiation as signal loading in the target system determines final timing ...

Page 12

... CS6150 THE PERFORMANCE ADVANTAGE OF AMPHION ASVCs The performance and cost tradeoffs between general- and fixed-purpose solutions are substantial and the gap grows with every generation of silicon process technology. The difference between general-purpose solutions ...

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