CDK1307 Cadeka Microcircuits LLC., CDK1307 Datasheet - Page 2

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CDK1307

Manufacturer Part Number
CDK1307
Description
12/13-bit Analog-to-digital Converters Adcs
Manufacturer
Cadeka Microcircuits LLC.
Datasheet

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Data Sheet
Pin Configuration
QFN-40
Pin Assignments
©2009 CADEKA Microcircuits LLC
DVDDCLK
17, 18, 25,
CM_EXT
26, 36, 37
1, 11, 16
Pin No.
DVDD
AVDD
AVDD
AVDD
CLKN
3, 4, 7
CLKP
5, 6
10
12
13
14
15
19
20
21
22
IN
IP
0
2
8
9
10
1
2
3
4
5
6
7
8
9
CLK_EXT_EN
Pin Name
DVDDCLK
CM_EXT
DFRMT
DVDD
OVDD
AVDD
OE_N
IP, IN
CLKN
PD_N
CLKP
VSS
D_0
D_1
D_2
D_3
CDK1307
QFN-40
Description
Ground connection for all power domains. Exposed pad
Digital and I/O-ring pre driver supply voltage, 1.8V
Common Mode voltage output
Analog supply voltage, 1.8V
Analog input (non-inverting, inverting)
Clock circuitry supply voltage, 1.8V
Clock input, non-inverting (format: LVDS, LVPECL, CMOS/TTL, Sine Wave)
Clock input, inverting. For CMOS input on CLKP, Connect CLKN to ground
CLK_EXT signal enabled when low (zero). Tristate when high.
Data format selection. 0: Offset Binary, 1: Two's Complement
Full chip Power Down mode when Low. All digital outputs reset to zero. After chip power up
always apply Power Down mode before using Active Mode to reset chip.
Output Enable. Tristate when high
I/O ring post-driver supply voltage. Voltage range 1.7 to 3.6V
Output Data (LSB, 13-bit output or 1V
Output Data (LSB, 12-bit output 2V
Output Data
Output Data
30
29
28
27
26
25
24
23
22
21
D_7
D_6
D_5
CLK_EXT
OVDD
OVDD
ORNG
D_4
D_3
D_2
pp
full scale range)
pp
full scale range)
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