ADT7467 Analog Devices, Inc., ADT7467 Datasheet - Page 23

• Manufacturer Part Number: ADT7467
• Description: Dbcool Remote Thermal Monitor And Fan Controller
• Manufacturer: Analog Devices, Inc.

Handling SMBALERT Interrupts
To prevent the system from being tied up with servicing
interrupts, it is recommend to handle the SMBALERT interrupt
as follows:
1.
2.
3.
4.
5.
6.
7.
Masking Interrupt Sources
Interrupt Mask Registers 1 and 2 are located at Addresses 0x74
and 0x75 and allow individual interrupt sources to be masked
to prevent SMBALERT interrupts. Note that masking an
interrupt source prevents only the SMBALERT output from
being asserted; the appropriate status bit is set normally.
Interrupt Mask Register 1 (Reg. 0x74)
Bit 7 (OOL) = 1 masks SMBALERT for any alert condition
flagged in Status Register 2.
Bit 6 (R2T) = 1 masks SMBALERT for Remote 2 temperature.
Bit 5 (LT) = 1 masks SMBALERT for local temperature.
Bit 4 (R1T) = 1 masks SMBALERT for Remote 1 temperature.
HIGH LIMIT
TEMPERATURE
STATUS BIT
SMBALERT
“STICKY”
Figure 29. Effect of Masking the Interrupt Source on SMBALERT Output
Detect the SMBALERT assertion.
Enter the interrupt handler.
Read the status registers to identify the interrupt source.
Mask the interrupt source by setting the appropriate mask
bit in the interrupt mask registers (Registers 0x74 and 0x75).
Take the appropriate action for a given interrupt source.
Exit the interrupt handler.
Periodically poll the status registers. If the interrupt status
bit has cleared, reset the corresponding interrupt mask bit
to 0. This causes the SMBALERT output and status bits to
behave as shown in Figure 29.
TEMP BACK IN LIMIT
(STATUS BIT STAYS SET)
INTERRUPT
MASK BIT SET
(TEMP BELOW LIMIT)
CLEARED ON READ
(SMBALERT REARMED)
INTERRUPT MASK BIT
CLEARED
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Bit 2 (V
Bit 0 (V
Interrupt Mask Register 2 (Reg. 0x75)
Bit 7 (D2) = 1 masks SMBALERT for Diode 2 errors.
Bit 6 (D1) = 1 masks SMBALERT for Diode 1 errors.
Bit 5 (FAN4) = 1 masks SMBALERT for Fan 4 failure.
If the TACH4 pin is used as the THERM input, this bit masks
SMBALERT for a THERM event.
Bit 4 (FAN3) = 1 masks SMBALERT for Fan 3.
Bit 3 (FAN2) = 1 masks SMBALERT for Fan 2.
Bit 2 (FAN1) = 1 masks SMBALERT for Fan 1.
Bit 1 (OVT) = 1 masks SMBALERT for overtemperature
(exceeding THERM temperature limits).
Enabling the SMBALERT Interrupt Output
The SMBALERT interrupt function is disabled by default. Pin 5
or Pin 9 can be reconfigured as an SMBALERT output to signal
out-of-limit conditions.
Table 12. Configuring Pin 5 as SMBALERT Output
Register
Configuration Register 3 (Reg. 0x78)
Assigning THERM Functionality to a Pin
Pin 9 on the ADT7467 has four possible functions: SMBALERT ,
THERM , GPIO, and TACH4. The user chooses the required
functionality by setting Bit 0 and Bit 1 of Configuration Register 4
at Address 0x7D.
Table 13. Configuring Pin 9
Bit 0
00
01
10
11
Once Pin 9 is configured as THERM , it must be enabled (Bit 1,
Configuration Register 3 at Address 0x78).
THERM as an Input
When THERM is configured as an input, the user can time
assertions on the THERM pin. This can be useful for connect-
ing to the PROCHOT output of a CPU to gauge system
performance.
CC
CCP
) = 1 masks SMBALERT for V
) = 1 masks SMBALERT for V
Bit 1
Function
TACH4
THERM
SMBALERT
GPIO
CC
CCP
channel.
channel.
Bit Setting
<0> ALERT = 1
ADT7467