PIC16F883 Microchip Technology Inc., PIC16F883 Datasheet - Page 180

• Manufacturer Part Number: PIC16F883
• Description: 28/40/44-pin Flash-based, 8-bit Cmos Microcontrollers With Nanowatt Technology
• Manufacturer: Microchip Technology Inc.

PIC16F882/883/884/886/887
REGISTER 13-3:
DS41291D-page 178
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
Note 1:
GCEN
R/W-0
For bits ACKEN, RCEN, PEN, RSEN, SEN: If the I
set (no spooling) and the SSPBUF may not be written (or writes to the SSPBUF are disabled).
GCEN: General Call Enable bit (in I
1 = Enable interrupt when a general call address (0000h) is received in the SSPSR
0 = General call address disabled
ACKSTAT: Acknowledge Status bit (in I
In Master Transmit mode:
1 = Acknowledge was not received from slave
0 = Acknowledge was received from slave
ACKDT: Acknowledge Data bit (in I
In Master Receive mode:
Value transmitted when the user initiates an Acknowledge sequence at the end of a receive
1 = Not Acknowledge
0 = Acknowledge
ACKEN: Acknowledge Sequence Enable bit (in I
In Master Receive mode:
1 = Initiate Acknowledge sequence on SDA and SCL pins, and transmit ACKDT data bit.
0 = Acknowledge sequence idle
RCEN: Receive Enable bit (in I
1 = Enables Receive mode for I
0 = Receive idle
PEN: Stop Condition Enable bit (in I
SCK Release Control:
1 = Initiate Stop condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Stop condition Idle
RSEN: Repeated Start Condition Enabled bit (in I
1 = Initiate Repeated Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Repeated Start condition Idle
SEN: Start Condition Enabled bit (in I
1 = Initiate Start condition on SDA and SCL pins. Automatically cleared by hardware.
0 = Start condition Idle
ACKSTAT
Automatically cleared by hardware.
R-0
SSPCON2: SSP CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
ACKDT
R/W-0
2
ACKEN
2
C Master mode only)
R/W-0
C
Preliminary
2
2
2
C Master mode only)
C Slave mode only)
C Master mode only)
2
C Master mode only)
2
C Master mode only)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
2
R/W-0
RCEN
C module is not in the Idle mode, this bit may not be
2
2
C Master mode only)
C Master mode only)
R/W-0
PEN
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-0
RSEN
R/W-0
SEN
bit 0