PIC16F883 Microchip Technology Inc., PIC16F883 Datasheet - Page 212

• Manufacturer Part Number: PIC16F883
• Description: 28/40/44-pin Flash-based, 8-bit Cmos Microcontrollers With Nanowatt Technology
• Manufacturer: Microchip Technology Inc.

PIC16F882/883/884/886/887
14.2.4
The BOREN0 and BOREN1 bits in the Configuration
Word Register 1 select one of four BOR modes. Two
modes have been added to allow software or hardware
control of the BOR enable. When BOREN<1:0> = 01,
the SBOREN bit (PCON<4>) enables/disables the
BOR allowing it to be controlled in software. By
selecting BOREN<1:0>, the BOR is automatically
disabled in Sleep to conserve power and enabled on
wake-up. In this mode, the SBOREN bit is disabled.
See
definition.
The BOR4V bit in the Configuration Word Register 2
selects one of two Brown-out Reset voltages. When
BOR4B = 1, V
is set to 2.1V.
If V
(T
the Brown-out situation will reset the device. This will
FIGURE 14-3:
DS41291D-page 210
BOR
DD
) (see Section 17.0 “Electrical Specifications”),
Register 14-3
Note 1: 64 ms delay only if PWRTE bit is programmed to ‘0’.
falls below V
BROWN-OUT RESET (BOR)
BOR
Internal
Internal
Internal
Reset
Reset
Reset
V
V
V
is set to 4V. When BOR4V = 0, V
DD
DD
DD
BOR
for
BROWN-OUT SITUATIONS
for greater than parameter
the
Configuration
Word
BOR
Preliminary
< 64 ms
64 ms
occur regardless of V
to occur if V
(T
On any Reset (Power-on, Brown-out Reset, Watchdog
Timer, etc.), the chip will remain in Reset until V
above V
will now be invoked, if enabled and will keep the chip in
Reset an additional 64 ms.
If V
running, the chip will go back into a Brown-out Reset
and the Power-up Timer will be re-initialized. Once V
rises above V
64 ms Reset.
(1)
BOR
Note:
64 ms
64 ms
DD
).
drops below V
(1)
BOR
(1)
DD
The Power-up Timer is enabled by the
PWRTE bit in the Configuration Word
Register 1.
(see Figure 14-3). The Power-up Timer
BOR
falls below V
, the Power-up Timer will execute a
DD
BOR
slew rate. A Reset is not insured
© 2007 Microchip Technology Inc.
while the Power-up Timer is
BOR
V
V
V
BOR
BOR
BOR
for less than parameter
DD
rises
DD