HD49335F Renesas Electronics Corporation., HD49335F Datasheet - Page 15

• Manufacturer Part Number: HD49335F
• Description: Cds/pga And 10-bit A/d Tg Converter
• Manufacturer: Renesas Electronics Corporation.

HD49335F/HF
Electrical Characteristics (cont.)
• Items for CDSIN Input Mode
Item
Consumption current (1)
Consumption current (2)
CCD offset tolerance range
Timing specifications (1)
Timing specifications (2)
Timing specifications (3)
Timing specifications (4)
Timing specifications (5)
Timing specifications (6)
Timing specifications (7)
Timing specifications (8)
Timing specifications (9)
Timing specifications (10)
Timing specifications (11)
Timing specifications (12)
Timing specifications (13)
Clamp level
PGA gain at CDS input
DLL operation frequency
T/G 3/1divided operation
frequency range
H Buffer output voltage
RG output voltage
Notes: 1. Define digital output full scall with 1 V input as 0 dB.
Rev.1.0, Feb.25.2004, page 15 of 29
2. Number of master steps: 60 steps, DLL current High
3. Number of master steps: 40 steps, DLL current Low
4. Number of master steps: 60 steps, DLL current Low
5. Values within parentheses ( ) are for reference.
Symbol
I
I
V
t
t
t
t
t
t
t
t
t
t
t
t
t
CLP(00)
CLP(09)
CLP(31)
AGC(0)
AGC(63)
AGC(127)
AGC(191)
AGC(255)
DLL_2
DLL_3
DLL_4
CLK_in3
V
V
V
V
V
V
V
V
V
V
V
V
DD1
DD2
CDS1
CDS2
CDS3
CDS4
CDS5
CDS6
CDS7
CDS8
CHLD9
COD10
CDS11
CDS12
CDS13
CCD
OH
OL
OH
OL
OH
OL
OH
OL
OH
OL
OH
OL
(Unless othewide specified, Ta = 25°C, AV
Min
—
—
(–100)
—
Typ × 0.8
—
Typ × 0.8
Typ × 0.85
1
—
—
—
—
—
—
—
—
—
—
–4.4
4.1
12.5
21.0
29.4
11
7
5.5
28.6
2.94
—
2.89
—
2.91
—
2.85
—
2.69
—
2.81
—
Typ
84
58
—
(1.5)
1/4f
(1.5)
1/4f
1/2f
5
1/2f
1/2f
(7)
(16)
(1/4f
(1/f
(1/2f
(14)
(32)
(76)
–2.4
6.1
14.5
23.0
31.4
—
—
—
—
2.97
22
2.94
50
2.96
36
2.93
60
2.86
115
2.90
78
CLK
CLK
CLK
CLK
CLK
CLK
CLK
CLK
)
)
)
Max
96.6
66.7
(100)
—
Typ × 1.2
—
Typ × 1.2
Typ × 1.15
9
—
—
—
—
—
—
—
—
—
—
–0.4
8.1
16.5
25.0
33.4
25
11
7
28.6
—
47
—
112
—
78
—
129
—
262
—
141
DD
Unit
mA
mA
mV
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
LSB
LSB
LSB
dB
dB
dB
dB
dB
MHz
MHz
MHz
MHz
V
MV
V
MV
V
MV
V
MV
V
mV
V
mV
= 3.0 V, DV
Test Conditions
f
f
C
C
f
30 mA Buff, I
30 mA Buff, I
14 mA Buff, I
14 mA Buff, I
10 mA Buff, I
10 mA Buff, I
4 mA Buff, I
4 mA Buff, I
2 mA Buff, I
2 mA Buff, I
I
I
CLK
CLK
CLK
OH
OL
L
L
= 10 pF
= 10 pF
= +2 mA
= –2 mA
= 36 MHz
= 20 MHz
= 1/3CLK_in3
DD
= 3.0 V, and R
OH
OL
OH
OL
OH
OL
OH
OL
OH
OL
= +2 mA
= +2 mA
= –2 mA
= –2 mA
= +5 mA
= +5 mA
= +3 mA
= –5 mA
= –5 mA
= –3 mA
Remarks
CDSIN mode
LoPwr = low
CDSIN mode
LoPwr = high
Refer to table 8
*1
*2
*3
*4
BIAS
= 33 kΩ)