MC56F8347 Freescale Semiconductor, Inc, MC56F8347 Datasheet - Page 149
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MC56F8347
Manufacturer Part Number
MC56F8347
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
1.MC56F8347.pdf
(172 pages)
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10.14 Controller Area Network (CAN) Timing
Note: CAN is not available in the 56F8147 device.
10.15 JTAG Timing
Freescale Semiconductor
Preliminary
1. TCK frequency of operation must be less than 1/8 the processor rate.
2. T = processor clock period (nominally 1/60MHz)
TCK frequency of operation using EOnCE
TCK frequency of operation not using EOnCE
TCK clock pulse width
TMS, TDI data set-up time
TMS, TDI data hold time
TCK low to TDO data valid
TCK low to TDO tri-state
TRST assertion time
CAN receive
1. Parameters listed are guaranteed by design
Baud Rate
Bus Wake Up detection
CAN_RX
data pin
(Input)
Characteristic
Characteristic
Figure 10-18 Bus Wake Up Detection
T
Symbol
BR
WAKEUP
CAN
1
Table 10-22 CAN Timing
Table 10-23 JTAG Timing
56F8347 Technical Data, Rev.11
1
Symbol
t
TRST
t
f
f
t
t
t
t
PW
OP
OP
DS
DH
DV
TS
T
Min
—
5
WAKEUP
Min
2T
DC
DC
50
—
—
5
5
2
Max
—
1
1
SYS_CLK/8
SYS_CLK/4
Max
30
30
—
—
—
—
Mbps
Unit
μs
Controller Area Network (CAN) Timing
MHz
MHz
Unit
ns
ns
ns
ns
ns
ns
See Figure
10-18
—
See Figure
10-19
10-19
10-19
10-20
10-20
10-20
10-20
10-21
149
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