MC56F8347 Freescale Semiconductor, Inc, MC56F8347 Datasheet - Page 28

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MC56F8347

Manufacturer Part Number
MC56F8347
Description
56f8300 16-bit Digital Signal Controllers
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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28
Table 2-2 Signal and Package Information for the 160-Pin LQFP and MBGA (Continued)
Signal Name
PHASEA0
PHASEB0
(GPIOC4)
(GPIOC5)
TRST
(TA0)
(TA1)
136
155
156
Pin
No.
Ball
No.
D9
A2
B4
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Schmitt
Output
Output
Output
Output
Input/
Input/
Input/
Input/
Type
Input
Input
Input
56F8347 Technical Data, Rev.11
internally
enabled
enabled
During
pull-up
pull-up
Reset
pulled
Input,
Input,
Input,
State
high
Test Reset — As an input, a low signal on this pin provides a
reset signal to the JTAG TAP controller. To ensure complete
hardware reset, TRST should be asserted whenever RESET
is asserted. The only exception occurs in a debugging
environment when a hardware device reset is required and
the JTAG/EOnCE module must not be reset. In this case,
assert RESET, but do not assert TRST.
To deactivate the internal pull-up resistor, set the JTAG bit in
the SIM_PUDR register.
Note:
the design is to be used in a debugging environment, TRST may be
tied to V
Phase A — Quadrature Decoder 0, PHASEA input
TA0 — Timer A, Channel 0
Port C GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is PHASEA0.
To deactivate the internal pull-up resistor, clear bit 4 of the
GPIOC_PUR register.
Phase B — Quadrature Decoder 0, PHASEB input
TA1 — Timer A, Channel
Port C GPIO — This GPIO pin can be individually
programmed as an input or output pin.
After reset, the default state is PHASEB0.
To deactivate the internal pull-up resistor, clear bit 5 of the
GPIOC_PUR register.
SS
For normal operation, connect TRST directly to V
through a 1K resistor.
Signal Description
Freescale Semiconductor
Preliminary
SS
. If

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