HT46R62 Holtek Semiconductor Inc., HT46R62 Datasheet - Page 21

• Manufacturer Part Number: HT46R62
• Description: Ht46r62/ht46c62 -- A/d With Lcd Type 8-bit Mcu
• Manufacturer: Holtek Semiconductor Inc.

A/D Converter
The 6 channels and 9 bits resolution A/D converter are
implemented in this microcontroller. The reference volt-
age is VDD. The A/D converter contains 4 special regis-
ters which are; ADRL (24H), ADRH (25H), ADCR (26H)
and ACSR (27H). The ADRH and ADRL are A/D result
register higher-order byte and lower-order byte and are
read-only. After the A/D conversion is completed, the
ADRH and ADRL should be read to get the conversion
result data. The ADCR is an A/D converter control regis-
ter, which defines the A/D channel number, analog
channel select, start A/D conversion control bit and the
end of A/D conversion flag. If the users want to start an
A/D conversion, define PB configuration, select the con-
verted analog channel, and give START bit a rising edge
and falling edge (0 1 0). At the end of A/D conver-
sion, the EOCB bit is cleared. The ACSR is A/D clock
setting register, which is used to select the A/D clock
source.
The A/D converter control register is used to control the
A/D converter. The bit2~bit0 of the ADCR are used to
select an analog input channel. There are a total of six
channels to select. The bit5~bit3 of the ADCR are used
to set PB configurations. PB can be an analog input or
as digital I/O line decided by these 3 bits. Once a PB line
is selected as an analog input, the I/O functions and
pull-high resistor of this I/O line are disabled and the A/D
Rev. 1.70
Bit No.
Bit No.
2~6
0
1
7
0
1
2
3
4
5
6
7
ADCS0
ADCS1
START Starts the A/D conversion. (0 1 0= start; 0 1= Reset A/D converter and set EOCB to 1 )
EOCB
Label
Label
ACS0
ACS1
ACS2
PCR0
PCR1
PCR2
TEST
Selects the A/D converter clock source
00= system clock/2
01= system clock/8
10= system clock/32
11= undefined
Unused bit, read as 0
For test mode used only
Defines the analog channel select.
Defines the port B configuration select. If PCR0, PCR1 and PCR2 are all zero, the ADC circuit is
power off to reduce power consumption
Indicates end of A/D conversion. (0 = end of A/D conversion)
Each time bits 3~5 change state the A/D should be initialized by issuing a START signal, other-
wise the EOCB flag may have an undefined condition. See Important note for A/D initialization .
ADCR (26H) Register
ACSR (27H) Register
21
converter circuit is powered-on. The EOCB bit (bit6 of
the ADCR) is end of A/D conversion flag. Check this bit
to know when A/D conversion is completed. The START
bit of the ADCR is used to begin the conversion of the
A/D converter. Giving START bit a rising edge and fall-
ing edge means that the A/D conversion has started. In
order to ensure that the A/D conversion is completed,
the START should remain at 0 until the EOCB is
cleared to 0 (end of A/D conversion).
Bit 7 of the ACSR register is used for test purposes only
and must not be used for other purposes by the applica-
tion program. Bit1 and bit0 of the ACSR register are
used to select the A/D clock source.
The EOCB bit is set to 1 when the START bit is set
from 0 to 1 .
Important Note for A/D initialization:
Special care must be taken to initialize the A/D con-
verter each time the Port B A/D channel selection bits
are modified, otherwise the EOCB flag may be in an un-
defined condition. An A/D initialization is implemented
by setting the START bit high and then clearing it to zero
within 10 instruction cycles of the Port B channel selec-
tion bits being modified. Note that if the Port B channel
selection bits are all cleared to zero then an A/D initial-
ization is not required.
Function
Function
HT46R62/HT46C62
February 14, 2006