DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 114
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DSPIC33FJ12MC202
Manufacturer Part Number
DSPIC33FJ12MC202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC33FJ12MC202.pdf
(284 pages)
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dsPIC33FJ12MC201/202
9.5
The
implement 21 registers for remappable peripheral
configuration:
• Input Remappable Peripheral Registers (13)
• Output Remappable Peripheral Registers (8)
REGISTER 9-1:
DS70265B-page 112
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-13
bit 12-8
bit 7-0
Note:
U-0
U-0
dsPIC33FJ12MC201/202 family
—
—
Peripheral Pin Select Registers
Input and Output Register values can only
be changed if OSCCON[IOLOCK] = 0.
See Section 9.4.4.1 “Control Register
Lock” for a specific command sequence.
Unimplemented: Read as ‘0’
INT1R<4:0>: Assign External Interrupt 1 (INTR1) to the corresponding RPn pin
11111 = Input tied V
01111 = Input tied to RP15
.
.
.
00001 = Input tied to RP1
00000 = Input tied to RP0
Unimplemented: Read as ‘0’
U-0
U-0
—
—
RPINR0: PERIPHERAL PIN SELECT INPUT REGISTER 0
W = Writable bit
‘1’ = Bit is set
U-0
U-0
—
—
SS
of
devices
R/W-1
U-0
Preliminary
—
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-1
U-0
—
INT1R<4:0>
R/W-1
U-0
—
© 2007 Microchip Technology Inc.
x = Bit is unknown
R/W-1
U-0
—
R/W-1
U-0
—
bit 8
bit 0
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