DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 35

• Manufacturer Part Number: DSPIC33FJ12MC202
• Description: High-performance, 16-bit Digital Signal Controllers
• Manufacturer: Microchip Technology Inc.

TABLE 3-10:
TABLE 3-11:
TABLE 3-12:
P2TCON
P2TMR
P2TPER
P2SECMP
PWM2CON1 05C8
PWM2CON2 05CA
P2DTCON1
P2DTCON2
P2FLTACON 05D0
P2OVDCON
P2DC1
Legend:
I2C1RCV
I2C1TRN
I2C1BRG
I2C1CON
I2C1STAT
I2C1ADD
I2C1MSK
Legend:
QEICON
DFLTCON
POSCNT
MAXCNT
Legend:
SFR Name
SFR Name
Name
SFR
u = uninitialized bit, — = unimplemented, read as ‘0’
u = uninitialized bit, — = unimplemented, read as ‘0’
x = unknown value on Reset, — = unimplemented, read as ‘0’. Reset values are shown in hexadecimal.
Addr.
Addr.
05CC
05CE
01E0 CNTERR
01E2
01E4
01E6
Addr
020A
020C
05C0
05C2
05C4
05C6 SEVTDIR
05D4
05D6
SFR
0200
0202
0204
0206
0208
2-OUTPUT PWM2 REGISTER MAP
QEI REGISTER MAP
I2C1 REGISTER MAP
ACKSTAT
Bit 15
PTDIR
Bit 15
PTEN
Bit 15
I2CEN
—
DTBPS<1:0>
—
—
—
—
—
—
—
—
—
—
—
Bit 14
Bit 14
TRSTAT
—
—
Bit 14
—
—
—
—
—
—
—
—
—
—
—
—
QEISIDL
PTSIDL
Bit 13
Bit 13
—
I2CSIDL
—
—
—
—
—
Bit 13
—
—
—
—
—
—
Bit 12 Bit 11 Bit 10
INDX
Bit 12
—
—
—
—
—
—
—
SCLREL
Bit 12
—
—
—
—
—
—
UPDN
—
Bit 11
—
—
—
—
—
DTB<5:0>
IPMIEN
Bit 11
—
—
—
—
—
—
IMV<1:0>
Bit 10
QEIM<2:0>
SEVOPS<3:0>
—
—
—
—
—
Bit 9
Bit 10
A10M
BCL
—
—
—
—
—
POVD1H POVD1L
FAOV1H FAOV1L
Bit 9
CEID
Bit 8
—
—
—
PWM Duty Cycle #1 Register
PWM Special Event Compare Register
Position Counter<15:0>
Maximum Count<15:0>
PWM Timer Count Value Register
DISSLW
GCSTAT
PWM Time Base Period Register
Bit 9
SWPAB PCDOUT
QEOUT
PMOD1
—
—
—
Bit 7
Bit 8
—
—
ADD10
SMEN
Bit 8
FLTAM
—
—
Bit 7
Bit 6
DTAPS<1:0>
—
—
—
—
IWCOL
QECK<2:0>
GCEN
Bit 7
Bit 6
TQGATE
PTOPS<3:0>
—
—
—
—
—
Bit 5
STREN
I2COV
Bit 6
Bit 5
—
—
—
—
—
Bit 4
TQCKPS<1:0>
Address Mask Register
PEN1H
Bit 4
ACKDT
Baud Rate Generator Register
Address Register
—
—
—
—
Bit 5
D_A
Bit 3
—
Bit 3
PTCKPS<1:0>
—
—
—
—
—
ACKEN
Transmit Register
Bit 4
Receive Register
DTA<5:0>
POSRES TQCS UPDN_SRC 0000 0000 0000 0000
P
Bit 2
—
Bit 2
IUE
—
—
—
—
RCEN
Bit 3
S
Bit 1
—
POUT1H POUT1L 1111 1111 0000 0000
OSYNC
DTS1A
Bit 1
PTMOD<1:0>
—
—
Bit 2
R_W
PEN
Bit 0
—
PEN1L 0000 0000 1111 1111
FAEN1 0000 0000 0000 0000
DTS1I
UDIS
Bit 0
RSEN
Bit 1
RBF
0000 0000 0000 0000
0000 0000 0000 0000
1111 1111 1111 1111
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
0000 0000 0000 0000
Reset State
Reset State
Bit 0
SEN
TBF
Resets
0000
00FF
0000
1000
0000
0000
0000
All