DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 133

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DSPIC33FJ12MC202

Manufacturer Part Number
DSPIC33FJ12MC202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet

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11.0
The Timer2/3 feature has three 2-bit timers that can
also be configured as two independent 16-bit timers
with selectable operating modes.
As a 32-bit timer, the Timer2/3 feature permits
operation in three modes:
• Two Independent 16-bit timers (e.g., Timer2 and
• Single 32-bit timer (Timer2/3)
• Single 32-bit synchronous counter (Timer2/3)
The Timer2/3 feature also supports:
• Timer gate operation
• Selectable prescaler settings
• Timer operation during Idle and Sleep modes
• Interrupt on a 32-bit period register match
• Time base for Input Capture and Output Compare
• ADC1 event trigger (Timer2/3 only)
Individually, all eight of the 16-bit timers can function as
synchronous timers or counters. They also offer the
features listed above, except for the event trigger. The
operating modes and enabled features are determined
by setting the appropriate bit(s) in the T2CON, T3CON
registers. T2CON registers are shown in generic form
in Register 11-1. T3CON registers are shown in
Register 11-2.
For 32-bit timer/counter operation, Timer2 is the least
significant word, and Timer3 is the most significant
word of the 32-bit timers.
© 2007 Microchip Technology Inc.
Note:
Timer3) with all 16-bit operating modes (except
Asynchronous Counter mode)
modules (Timer2 and Timer3 only)
Note:
TIMER2/3 FEATURE
This data sheet summarizes the features
of the dsPIC33FJ12MC201/202 devices.
It is not intended to be a comprehensive
reference source. To complement the
information in this data sheet, refer to the
“dsPIC33F Family Reference Manual”.
Please see the Microchip web site
(www.microchip.com)
dsPIC33F
chapters.
For 32-bit operation, T3CON control bits
are ignored. Only T2CON control bits are
used for setup and control. Timer2 clock
and gate inputs are used for the 32-bit
timer modules, but an interrupt is
generated with the Timer3 interrupt flags.
Family
Reference
for
the
Manual
latest
Preliminary
dsPIC33FJ12MC201/202
11.1
To configure the Timer2/3 feature timers for 32-bit
operation:
1.
2.
3.
4.
5.
6.
The timer value at any point is stored in the register
pair, TMR3:TMR2, which always contains the most
significant word of the count, while TMR2 contains the
least significant word.
11.2
To configure any of the timers for individual 16-bit
operation:
1.
2.
3.
4.
5.
6.
Set the T32 control bit.
Select the prescaler ratio for Timer2 using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the
corresponding TCS and TGATE bits.
Load the timer period value. PR3 contains the
most significant word of the value, while PR2
contains the least significant word.
If interrupts are required, set the interrupt enable
bit, T3IE. Use the priority bits, T3IP<2:0>, to set
the interrupt priority. While Timer2 controls the
timer, the interrupt appears as a Timer3
interrupt.
Set the corresponding TON bit.
Clear the T32 bit corresponding to that timer.
Select the timer prescaler ratio using the
TCKPS<1:0> bits.
Set the Clock and Gating modes using the TCS
and TGATE bits.
Load the timer period value into the PRx
register.
If interrupts are required, set the interrupt enable
bit, TxIE. Use the priority bits, TxIP<2:0>, to set
the interrupt priority.
Set the TON bit.
32-bit Operation
16-bit Operation
DS70265B-page 131

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