DSPIC33FJ12MC202 Microchip Technology Inc., DSPIC33FJ12MC202 Datasheet - Page 137
DSPIC33FJ12MC202
Manufacturer Part Number
DSPIC33FJ12MC202
Description
High-performance, 16-bit Digital Signal Controllers
Manufacturer
Microchip Technology Inc.
Datasheet
1.DSPIC33FJ12MC202.pdf
(284 pages)
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REGISTER 11-2:
© 2007 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14
bit 13
bit 12-7
bit 6
bit 5-4
bit 3-2
bit 1
bit 0
Note 1:
TON
R/W-0
U-0
—
(1)
When 32-bit operation is enabled (T2CON<3> = 1), these bits have no effect on Timer3 operation; all timer
functions are set through T2CON.
TON: Timer3 On bit
1 = Starts 16-bit Timer3
0 = Stops 16-bit Timer3
Unimplemented: Read as ‘0’
TSIDL: Stop in Idle Mode bit
1 = Discontinue module operation when device enters Idle mode
0 = Continue module operation in Idle mode
Unimplemented: Read as ‘0’
TGATE: Timer3 Gated Time Accumulation Enable bit
When TCS = 1:
This bit is ignored.
When TCS = 0:
1 = Gated time accumulation enabled
0 = Gated time accumulation disabled
TCKPS<1:0>: Timer3 Input Clock Prescale Select bits
11 = 1:256
10 = 1:64
01 = 1:8
00 = 1:1
Unimplemented: Read as ‘0’
TCS: Timer3 Clock Source Select bit
1 = External clock from pin T3CK (on the rising edge)
0 = Internal clock (F
Unimplemented: Read as ‘0’
TGATE
R/W-0
U-0
—
T3CON CONTROL REGISTER
(1)
W = Writable bit
‘1’ = Bit is set
TSIDL
R/W-0
R/W-0
(1)
CY
TCKPS<1:0>
)
(1)
(1)
R/W-0
U-0
(1)
Preliminary
—
(1)
dsPIC33FJ12MC201/202
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
—
—
(1)
(1)
U-0
U-0
—
—
x = Bit is unknown
TCS
R/W-0
U-0
—
(1)
DS70265B-page 135
U-0
U-0
—
—
bit 8
bit 0
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