IXXBB1 Fujitsu Microelectronics, Inc., IXXBB1 Datasheet - Page 117

• Manufacturer Part Number: IXXBB1
• Description: 32-bit Proprietary Microcontroller Cmos Fr60 Mb91301 Series
• Manufacturer: Fujitsu Microelectronics, Inc.

*1 : M
*2 : A high-speed mode I
*3 : For use at over 100 kHz, set the resource clock frequency to at least 6 MHz.
*4 : R and C represent the pull-up resistor and load capacitor of the SCL and SDA output lines.
SCL clock frequency
“L” period of SCL clock t
“H” period of SCL clock t
BUS free time between
“STOP condition” and
“START condition”
SCL
delay time
Setup time of “repeat
START condition”
SCL
Hold time of “repeat
START condition”
SDA
Setup time of “STOP
condition”
SCL
SDA data input hold
time (vs. SCL )
SDA data input setup
time (vs. SCL )
(13) I
• At master mode operation
satisfies a requirement of “t
When a certain device does not extend the “L” period of the SCL signal, the next data must be output to the
SDA line within 1250 ns (maximum SDA/SCL rise time
2
Parameter
C Timing
SDA output
SDA
SDA
SCL
resource clock cycle (ns)
Sym-
t
t
t
t
t
t
HDDAT
SUSTO
HDDAT
SUSTA
HDSTA
SUDAT
bol
f
t
HIGH
2
LOW
SCL
BUS
C bus device can be used for a standard mode I
SCL0, SCL1,
SCL0, SCL1,
SCL0, SCL1,
SCL0, SCL1,
SDA0, SDA1
SDA0, SDA1
SDA0, SDA1
SDA0, SDA1
SDA0, SDA1
SDA0, SDA1
SDA0, SDA1
SCL0, SCL1
SCL0, SCL1
SCL0, SCL1
SUDAT
Pin
250 ns”.
Conditions
C
R
(A
50 pF*
VCC
1 k ,
V
4
CC
2
Typical mode
Min
250
4.7
4.0
4.7
4.7
4.0
4.0
t
0
3.3
SUDATA
M*
1
5
) in which the SCL line is released.
0.3 V, A
Max
100
M*
1
2
C bus system as long as the device
VSS
2
100*
Fast mode*
MB91301 Series
Min
1.3
0.6
1.3
0.6
0.6
0.6
0
M*
V
2
SS
1
5
Max
400
0.0 V, Ta
M*
3
1
Unit
kHz
ns
ns
s
s
s
s
s
s
s
0 C to 70 C)
After that, the
first clock pulse
is generated.
Remarks
117