IXXBB1 Fujitsu Microelectronics, Inc., IXXBB1 Datasheet - Page 52
IXXBB1
Manufacturer Part Number
IXXBB1
Description
32-bit Proprietary Microcontroller Cmos Fr60 Mb91301 Series
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
1.IXXBB1.pdf
(135 pages)
- Current page: 52 of 135
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52
MB91301 Series
Configuration
Instruction Cache Configuration
INSTRUCTION CACHE
The instruction cache is a fast local memory for temporary storage. Once an instruction code is accessed from
external slower memory, the instruction cache holds the instruction code inside to increase the speed of access-
ing the same code from then on.
By setting the RAM mode, the instruction cache data RAM is made directly read/write-accessible by software.
• FR family’s basic instruction length : Two bytes
• Block layout : Two-way set associative
• Blocks : 128 blocks per way
Way 1
Way 2
128
128 block
block
16 bytes per block (
4 bytes per sub-block (
Cash tag
Cash tag
Cash tag
Cash tag
4 bytes
4 sub-blocks)
1 bus access unit)
block 3
block 3
block 3
block 3
4 bytes
Sub
Sub
Sub
Sub
I3
block 2
block 2
block 2
block 2
4 bytes
Sub
Sub
Sub
Sub
I2
block 1
block 1
block 1
block 1
4 bytes
Sub
Sub
Sub
Sub
I1
block 0
block 0
block 0
block 0
4 bytes
Sub
Sub
Sub
Sub
I0
block 127
block 0
block 127
block 0
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