IXXBB1 Fujitsu Microelectronics, Inc., IXXBB1 Datasheet - Page 36

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IXXBB1

Manufacturer Part Number
IXXBB1
Description
32-bit Proprietary Microcontroller Cmos Fr60 Mb91301 Series
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
36
MB91301 Series
1. Mode Pins
* : Single chip mode is able to set only MB91302A.
2. Mode Register (MODR)
<Details of mode register (MODR) >
<Details of mode data>
MD2
MODE SETTINGS
In the FR series, the mode is set by the mode pins (MD2, MD1, and MD0) and mode register (MODR).
The MD2, MD1, and MD0 pins specify how the mode vector fetch is performed.
Values other than those listed in the table are prohibited.
• Details of mode register (MODR)
Bit31 to bit24 are all reserved bits.
Be sure to set this bit to “00000.”
Operation is not guaranteed when any value other than “00000.” is set.
0
0
The data written to the mode register by the mode vector fetch operation (see “3.11.3 reset sequences”) is
called the mode data.
After the data is set to the mode register (MODR), the device operates with the operating mode specified by
this data. The mode register is set by all types of reset. The register cannot be written to by user programs.
Mode Pins
MD1
0
0
Address
Address
MD0
0
1
bit
bit
External ROM vector mode
Internal ROM vector mode
23
31
Mode name
22
30
21
29
20
28
Reset vector access
19
27
External
Internal
area
Operation mode setting bits
Operation mode setting bits
ROMA
ROMA
18
26
W
W
WTH1
WTH1
17
25
W
W
Single-chip mode*
The bus width is specified by the
mode register.
WTH0
WTH0
16
24
W
W
XXXXXXXX
XXXXXXXX
Remarks
Initial Value
Initial Value
B
B

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