AD5560 Analog Devices, Inc., AD5560 Datasheet - Page 36

• Manufacturer Part Number: AD5560
• Description: 1.2 A Programmable Device Power Supply With Integrated 16-bit Level Setting Dacs
• Manufacturer: Analog Devices, Inc.

AD5560
stability problems. This is most likely to be the case when there
are both a large C
The R
prudent not to cancel exact pole/zero cancellation with R
instead allow the zero to be 2× to 3× the frequency of the pole.
It is best to be very conservative when using R
load pole. Choose a high zero frequency to avoid flat spots in
the gain curve that extend bandwidth, and be conservative when
choosing R
exact cancellation frequency and the R
exact cancellation frequency. The best solution here is to avoid
this complexity by using a high quality capacitor with low ESR.
COMPENSATION STRATEGIES
Ensuring Stability into an Unknown Capacitor Up to a
Maximum Value
If the AD5560 has to be stable in a range of load capacitance
from no load capacitance to an upper limit, then select manual
compensation mode and, in Compensation Register 2, set the
parameters according to the maximum load capacitance listed
in Table 14.
Table 14. Suggested Compensation Settings for Load Capa-
citance Range of Unknown Value to Some Maximum Value
Min
0
0
0
0
0
Table 14 assumes that the C
suggested in Table 8.
Making a circuit stable over a range of load capacitances for
no load capacitance or greater means that the circuit is over-
compensated for small load capacitances, undercompensated
for high load capacitances, or both. The previous choice settings,
along with the suggested capacitor values, is a compromise
between both. By compromising phase margin into the largest
load capacitors, the system bandwidth can be increased, which
means better performance under load current transient condi-
tions. The disadvantage is that there is more overshoot during a
large DAC step. To reduce this at the expense of settling time, it
may be desirable to temporarily switch a capacitor range 5× or
10× larger before making a large DAC step.
OPTIMIZING PERFORMANCE FOR A KNOWN
CAPACITOR USING AUTOCOMPENSATION MODE
The autocompensation mode decides what values of g
C
particular capacitor. Both the capacitance and its ESR need to
be known. To avoid creating an oscillator, the capacitance should
not be overestimated and the ESR should not be underesti-
mated. Use the following steps to determine compensation
Fx
Capacitor
, R
Z
P
, and R
Max
0.22 μF
2.2 μF
10 μF
20 μF
160 μF
resistor is intended to solve this problem. Again, it is
P
to create a pole. Aim to place the R
P
should be chosen for good performance in a
R
g
2
2
2
2
2
and large R
m[1:0]
R
0
0
0
0
0
Cx
P[2:0]
and C
C
.
Fx
R
0
0
0
0
0
capacitor values are those
P
Z[2:0]
pole at around 2× the
Z
C
000
001
010
011
111
to cancel the
Z
C[3:1]
zero at 5× the
mx
, C
Z
C
2
3
4
4
4
F[2:0]
and
Cx
Rev. B | Page 36 of 60
settings when using the manual compensation register (this
algorithm is what the autocompensation method is based upon):
1.
2.
3.
4.
5.
6.
7.
8.
9.
Use C
ESR of that load capacitance) as inputs.
Assume that C
not been underestimated. (Although, when the ESR R
shown to have a frequency dependence, the lowest R
occurs near the resonant frequency is probably a better
guide. However, do not underestimate this ESR).
a.
b.
c.
Select g
the force amplifier; have g
compensation capacitors, C
active.
Choose a C
capacitor that is smaller than C
If C
algorithm.
Calculate R
following steps:
a.
b.
c.
If R
DUT look resistive. Choose R
the algorithm
Calculate the unity gain frequency (Fug), the ideal unity
gain frequency of the force amplifier, from Fug =
g
gives g
480 kHz.
Calculate F
1/(2πR
mx
/2πC
C
R
C
C
up to 2.2 μF (C
capacitive loads, include smaller C
and C
corresponding C
There is approximately 1 Ω of parasitic resistance, R
from the AD5560 to the DUT (for example, the cable);
R
Calculate R
current range using R
Calculate R
capacitor, by using
R
Calculate R
account of frequency dependent peaking, through the
C
R
That is, R
selected C
Then calculate
R
where R
< 100 nF, then set R
> (R
R
F
FM
0
C0
Fx
C
Fx
mx
0
(the load capacitance with a series ESR) and R
= R
m[1:0]
= 1.2 Ω + (ESR of C
C
= 1 Ω.
C0
capacitor values are as suggested, and they extend
buffers into a large capacitive load, by using
is the suggested 100 pF.
= R
= 300 μA/V and C
C0
0
. Using the previously suggested values (g
/5), then the ESR is large enough to make the
F2
C
).
P
F[2:0]
0
= 2, C
. If a capacitor is not included, then short the
, the resistive impedance to the DUT, using the
, the load pole frequency, using F
F
+ (R
C
/(1 + [2 × (C
takes its value from the assumptions in Step 2.
FM
R
Fx
value from 0 to 4 to select the largest C
has not been overestimated and that R
S
F
FM
, the sense resistor, from the selected
, the output impedance, through the C
is up to 3× smaller than R
capacitor is large compared to 2.2 μF.
S
C[3:1]
, a modified version of R
||R
F4
FM
). For faster settling into small
Fx
= 000. This makes the input stage of
)
pin to one that is.
Z[2:0]
Fx
mx
S
Fx
/2.2 μF)])
C0
C1
= 0.5 V/I
= 300 μA/V; deselect the
, C
= 0, R
capacitor)
Z[2:0]
= 100 pF), Fug calculates to
R
C2
.
, C
= 0, R
P[2:0]
C3,
RANGE
so that only C
Fx
= 0. This ends the
P[2:0]
values such as C
.
F
F
, when the
, which takes
= 0. This ends
P
=
m[1:0]
C
C0
C
C
that
Fx
C
(the
is
is
Fx
= 2
has
C
F3
,