ADN2865 Analog Devices, Inc., ADN2865 Datasheet - Page 27

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ADN2865

Manufacturer Part Number
ADN2865
Description
Continuous Rate 12.3mb/s To 2.7gb/s Clock And Data Recovery Ic W/loop Timed Serdes
Manufacturer
Analog Devices, Inc.
Datasheet
Preliminary Technical Data
Transmission Lines
Use of 50 Ω transmission lines is required for all LVDS and
CML input and output signals to minimize reflections: PIN,
NIN, RXDATAP/N[7:0], RXCLKP/N, SERDATP, SERDATN,
SERCLKP, SERCLKN (also REFCLKP, REFCLKN, if a high
frequency reference clock is used, such as 155 MHz). It is also
necessary for the PIN/NIN input traces to be matched in length,
and the parallel bus / CML output traces to be matched in
length to avoid skew between the differential traces. All high
speed CML outputs, SERDATP,SERDATN,SERCLKP,SERCLKN
also require 100 Ω back termination chip resistors connected
between the output pin and VCC. These resistors should be
placed as close as possible to the output pins. These 100 Ω
resistors are in parallel with on-chip 100 Ω termination resistors
to create a 50 Ω back termination (see Figure ).
The high speed inputs, PIN and NIN, are internally terminated
with 50 Ω to an internal reference voltage (see Figure ). A 0.1 μF
is recommended between VREF, Pin 36, and GND to provide
an ac ground for the inputs.
As with any high speed mixed-signal design, take care to keep
all high speed digital traces away from sensitive analog nodes.
Soldering Guidelines for Chip Scale Package
The lands on the 56 LFCSP are rectangular. The printed circuit
board pad for these should be 0.1 mm longer than the package
land length and 0.05 mm wider than the package land width.
The land should be centered on the pad. This ensures that the
solder joint size is maximized. The bottom of the chip scale
V C C
Figure 29. ADN2865 AC-Coupled Input Configuration
T I A
Figure 28. Typical ADN2865 Applications Circuit
A D N 2 8 6 5
1 0 0
V C C
1 0 0
5 0 Ω
1 0 0
0 . 1 u F
C I N
V C C
C I N
1 0 0
P I N
V R E F
N I N
0 . 1 μ
0 . 1 μ
A D N 2 8 6 5
5 0
5 0 Ω
5 0
3k
V TERM
V TERM
2.5V
50
50
Rev. PrA | Page 27 of 33
package has a central exposed pad. The pad on the printed
circuit board should be at least as large as this exposed pad. The
user must connect the exposed pad to VEE using plugged vias
so that solder does not leak through the vias during reflow. This
ensures a solid connection from the exposed pad to VEE.
Choosing AC Coupling Capacitors
AC coupling capacitors at the input (PIN, NIN) and output
(SERDATP,SERDATN) of the ADN2865 must be chosen such
that the device works properly over the full range of data rates
used in the application. When choosing the capacitors, the time
constant formed with the two 50 Ω resistors in the signal path
must be considered. When a large number of consecutive
identical digits (CIDs) are applied, the capacitor voltage can
droop due to baseline wander (see Figure ), causing pattern-
dependent jitter (PDJ).
The user must determine how much droop is tolerable and
choose an ac coupling capacitor based on that amount of droop.
The amount of PDJ can then be approximated based on the
capacitor selection. The actual capacitor value selection may
require some trade-offs between droop and PDJ.
Example: Assuming that 2% droop can be tolerated, then the
maximum differential droop is 4%. Normalizing to V
where:
τ is the RC time constant (C is the ac coupling capacitor, R =
100 Ω seen by C).
t is the total discharge time, which is equal to n
n is the number of CIDs.
T is the bit period.
The capacitor value can then be calculated by combining the
equations for τ and t:
Once the capacitor value is selected, the PDJ can be
approximated as
where:
PDJ
< 0.01 UI p-p typical.
t
where BW ~ 0.7 (bit rate).
Note that this expression for t
The output rise time for the ADN2865 is ~100 ps regardless of
data rate.
r
is the rise time, which is equal to 0.22/BW,
Droop = Δ V = 0.04 V = 0.5 V
pspp
C
PDJ
is the amount of pattern-dependent jitter allowed;
=
12
pspp
nT
=
/
R
0
5 .
t
r
(
1
e
(
nT/RC
r
is accurate only for the inputs.
)
pp
)
0 /
(1 − e
6 .
–t/τ
) ; therefore, τ = 12t
Τ
.
ADN2865
pp
:

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