IR3513Z International Rectifier Corp., IR3513Z Datasheet - Page 18

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IR3513Z

Manufacturer Part Number
IR3513Z
Description
Xphase3tm Pol Control Ic
Manufacturer
International Rectifier Corp.
Datasheet

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Constant Over-Current Control during Soft Start
The over-current limit threshold is set by a resistor connected between OCSET and VREF pins. If the IIN pin voltage,
which is proportional to the average current plus VREF voltage, exceeds the OCSET voltage during soft start, the
constant over-current control is activated.
Figure 9 shows the constant over-current control with delay during soft start. The delay is required since over-current
conditions can occur as part of normal operation due to inrush current.
If an over-current occurs during soft start (before PG is asserted), the SS/DEL voltage is regulated by the over current
amplifier to limit the output current below the threshold set by OCSET voltage. If the over-current condition persists after
the delay time is reached, the fault latch will be set pulling the error amplifier’s output low and inhibiting switching in the
phase ICs. The SS/DEL capacitor will discharge until it reaches 0.2V and the fault latch is reset allowing a normal soft
start to occur. If an over-current condition is again encountered during the soft start cycle, the constant over-current
control actions will repeat and the converter will be in hiccup mode. The delay time is controlled by a counter, which is
triggered by the oscillator. The counter values vary with switching frequency per phase in order to have a similar delay
time for different switching frequencies.
Over-Current Hiccup Protection after Soft Start
The over current limit threshold is set by a resistor connected between OCSET and VREF pins. Figure 9 shows the
constant over-current control with delay after PG is asserted. The delay is required since over-current conditions can
occur as part of normal operation due to load transients or margin transitions.
If the IIN pin voltage, which is proportional to the average current plus VREF voltage, exceeds the OCSET voltage after
PG is asserted, it will initiate the discharge of the capacitor at SS/DEL. If the over-current condition persists long enough
for the SS/DEL capacitor to discharge below the 120mV offset of the delay comparator, the fault latch will be set pulling
the error amplifier’s output low and inhibiting switching in the phase ICs and de-asserting the PG signal. The output
current is not controlled during the delay time. The SS/DEL capacitor will discharge until it reaches 200 mV and the fault
latch is reset allowing a normal soft start to occur. If an over-current condition is again encountered during the soft start
cycle, the over-current action will repeat and the converter will be in hiccup mode.
Page 18
ENABLE
VREF
SS/DEL
EAOUT
VOUT
VCC
PG
0.8V
3.2V
3.12V
1.4V
START DELAY
Figure 8 - Start-up sequence
SOFT START
TIME
PG DELAY TIME
May 11, 2009
NORMAL OPERATION
IR3513Z

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