MBM29DL161TE-70TN Meet Spansion Inc., MBM29DL161TE-70TN Datasheet - Page 29

• Manufacturer Part Number: MBM29DL161TE-70TN
• Description: Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit Dual Operation
• Manufacturer: Meet Spansion Inc.

■ FUNCTIONAL DESCRIPTION
*: By writing erase suspend command on the bank address of sector being erased, the erase operation becomes
• Simultaneous Operation
MBM29DL16XTE/BE have feature, which is capability of reading data from one bank of memory while a program
or erase operation is in progress in the other bank of memory (simultaneous operation), in addition to the
conventional features (read, program, erase, erase-suspend read, and erase-suspend program). The bank
selection can be selected by bank address (A
The MBM29DL161TE/BE have two banks which contain
The MBM29DL162TE/BE have two banks which contain
The MBM29DL163TE/BE have two banks which contain
The MBM29DL164TE/BE have two banks which contain
The simultaneous operation can not execute multi-function mode in the same bank. “Simultaneous Operation
Table” shows combination to be possible for simultaneous operation. (Refer to “(8) Bank-to-bank Read/Write
Timing Diagram” in ■TIMING DIAGRAM.)
suspended so that it enables reading from or programming the remaining sectors.
• Read Mode
The MBM29DL16XTE/BE have two control functions which must be satisfied in order to obtain data at the
outputs. CE is the power control and should be used for a device selection. OE is the output control and should
be used to gate data to the output pins if a device is selected.
Address access time (t
access time (t
enable access time (t
addresses have been stable for at least t
power-up, it is necessary to input hardware reset or to change CE pin from “H” to “L”.
Bank 1 (8KB × 8 sectors) and Bank 2 (64KB × 31 sectors).
Bank 1 (8KB × 8 sectors, 64KB × 3 sectors) and Bank 2 (64KB × 28 sectors).
Bank 1 (8KB × 8 sectors, 64KB × 7 sectors) and Bank 2 (64KB × 24 sectors).
Bank 1 (8KB × 8 sectors, 64KB × 15 sectors) and Bank 2 (64KB × 16 sectors).
Case
1
2
3
4
5
6
7
CE
) is the delay from stable addresses and stable CE to valid data at the output pins. The output
OE
ACC
) is the delay from the falling edge of OE to valid data at the output pins. (Assuming the
) is equal to the delay from stable addresses to valid output data. The chip enable
Autoselect mode
Bank 1 Status
Program mode
Erase mode *
Read mode
Read mode
Read mode
Read mode
Retired Product DS05-20880-5E_July 13, 2007
Simultaneous Operation Table
ACC
-t
OE
19
time.) When reading out a data without changing addresses after
to A
15
) with zero latency.
MBM29DL16XTE/BE
Autoselect mode
Bank 2 Status
Program mode
Erase mode *
Read mode
Read mode
Read mode
Read mode
70/90
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