MBM29LV160TE70TN Meet Spansion Inc., MBM29LV160TE70TN Datasheet - Page 21

no-image

MBM29LV160TE70TN

Manufacturer Part Number
MBM29LV160TE70TN
Description
Flash Memory Cmos 16m 2m ? 8/1m ? 16 Bit
Manufacturer
Meet Spansion Inc.
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
MBM29LV160TE70TN
Manufacturer:
FUJ
Quantity:
632
Part Number:
MBM29LV160TE70TN-JKP
Manufacturer:
SPANSION
Quantity:
2 122
Part Number:
MBM29LV160TE70TN-L
Manufacturer:
SPANSION
Quantity:
468
Part Number:
MBM29LV160TE70TN-L
Manufacturer:
TOSHIBA
Quantity:
5 532
■ COMMAND DEFINITIONS
Device operations are selected by writing specific address and data sequences into the command register.
Writing incorrect address and data values or writing them in an improper sequence will reset the device to the
read mode. “MBM29LV160TE/BE Standard Command Definitions” Table in “■FLEXIBLE SECTOR-ERASE
ARCHITECTURE” defines the valid register command sequences. Note that the Erase Suspend (B0h) and
Erase Resume (30h) commands are valid only while the Sector Erase operation is in progress. Moreover both
Read/Reset commands are functionally equivalent, resetting the device to the read mode. Please note that
commands are always written at DQ
• Read/Reset Command
In order to return from Autoselect mode or Exceeded Timing Limits (DQ
operation is initiated by writing the Read/Reset command sequence into the command register. Microprocessor
read cycles retrieve array data from the memory. The device remains enabled for reads until the command
register contents are altered.
The device will automatically power-up in the Read/Reset state. In this case, a command sequence is not required
to read data. Standard microprocessor read cycles will retrieve array data. This default value ensures that no
spurious alteration of the memory contents occurs during the power transition. Refer to the AC Read Charac-
teristics and Waveforms for specific timing parameters. (See “Read Operation Timing Diagram” in “■TIMING
DIAGRAM”.)
• Autoselect Command
Flash memories are intended for use in applications where the local CPU alters memory contents. As such,
manufactures and device codes must be accessible while the device resides in the target system. PROM
programmers typically access the signature codes by raising A
voltage onto the address lines is not generally desired system design practice.
The device contains an Autoselect command operation to supplement traditional PROM programming method-
ology. The operation is initiated by writing the Autoselect command sequence into the command register. Fol-
lowing the last command write, a read cycle from address XX00h retrieves the manufacture code of 04h. A read
cycle from address XX01h for ×16 (XX02h for ×8) retrieves the device code (MBM29LV160TE = C4h and
MBM29LV160BE = 49h for ×8 mode; MBM29LV160TE = 22C4h and MBM29LV160BE = 2249h for ×16 mode).
(See “MBM29LV160TE/BE Sector Protection Verify Autoselect Code and Expanded Autoselect Code” Tables
in “■FLEXIBLE SECTOR-ERASE ARCHITECTURE”.)
All manufactures and device codes will exhibit odd parity with DQ
The sector state (protection or unprotection) will be indicated by address XX02h for ×16 (XX04h for ×8).
Scanning the sector addresses (A
a logical “1” at device output DQ
mode verification on the protected sector. (See “MBM29LV160TE/BE User Bus Operation (BYTE = V
(BYTE = V
To terminate the operation, it is necessary to write the Read/Reset command sequence into the register and,
also to write the Autoselect command during the operation, by executing it after writing the Read/Reset command
sequence.
• Byte/Word Programming
The device is programmed on a byte-by-byte (or word-by-word) basis. Programming is a four bus cycle operation.
There are two “unlock” write cycles. These are followed by the program set-up command and data write cycles.
Addresses are latched on the falling edge of CE or WE, whichever happens later and the data is latched on the
rising edge of CE or WE, whichever happens first. The rising edge of the last CE or WE (whichever happens
first) begins programming. Upon executing the Embedded Program Algorithm command sequence, the system
is not required to provide further controls or timings. The device will automatically provide adequate internally
generated program pulses and verify the programmed cell margin. (See “Alternate WE Controlled Program
Operation Timing Diagram” and “Alternate CE Controlled Program Operation Timing Diagram” in “■TIMING
DIAGRAM”.)
IL
)” Tables in “■DEVICE BUS OPERATIONS”.)
MBM29LV160TE
0
for a protected sector. The programming verification should be perform margin
19
, A
7
Retired Product DS05-20883-7E_July 31, 2007
to DQ
18
, A
17
0
, A
and DQ
16
, A
15
, A
15
to DQ
14
, A
70/90
13
, and A
8
bits are ignored.
9
to a high voltage. However, multiplexing high
7
/MBM29LV160BE
defined as the parity bit.
12
) while (A
5
= 1) to read mode, the read/reset
6
, A
1
, A
0
) = (0, 1, 0) will produce
IH
70/90
) and
21

Related parts for MBM29LV160TE70TN