MBM29LV160TE Fujitsu Microelectronics, Inc., MBM29LV160TE Datasheet - Page 22

• Manufacturer Part Number: MBM29LV160TE
• Description: 16m 2m X 8/1m X 16 Bit
• Manufacturer: Fujitsu Microelectronics, Inc.

22
MBM29LV160TE/BE
Notes: 1. Performing successive read operations from any address will cause DQ
Data Polling
In
Progress
Exceeded
Time
Limits
• Write Operation Status
• DQ
The MBM29LV160TE/BE device features Data Polling as a method to indicate to the host that the Embedded
Algorithms are in progress or completed. During the Embedded Program Algorithm, an attempt to read the
devices will produce the complement of the data last written to DQ
Algorithm, an attempt to read the device will produce the true data last written to DQ
Erase Algorithm, an attempt to read the device will produce a “0” at the DQ
Embedded Erase Algorithm an attempt to read the device will produce a “1” at the DQ
for Data Polling (DQ
For chip erase and sector erase, Data Polling is valid after the rising edge of the sixth WE pulse in the six-write
pulse sequence. Data Polling must be performed at a sector address within any of the sectors being erased and
not at a protected sector. Otherwise, the status may not be valid. Once the Embedded Algorithm operation is
close to being completed, the MBM29LV160TE/BE data pins (DQ
enable (OE) is asserted low. This means that the device is driving status information on DQ
time and then that byte’s valid data at the next instant of time. Depending on when the system samples the DQ
output, it may read the status or valid data. Even if the device has completed the Embedded Program Algorithm
operation and DQ
to DQ
The Data Polling feature is only active during the Embedded Programming Algorithm, Embedded Erase Algorithm
or sector erase time-out.
See Figure 9 for the Data Polling timing specifications and diagram.
2. Reading the byte address being programmed while in the erase-suspend program mode will indicate
3. DQ
4. DQ
7
7
will be read on successive read attempts.
logic “1” at the DQ
toggle.
Embedded Program Algorithm
Embedded/Erase Algorithm
Erase
Suspend
Mode
Embedded Program Algorithm
Embedded/Erase Algorithm
Erase Suspend Program
(Non-Erase Suspended Sector)
0
4
and DQ
is Fujitsu internal use only.
7
has a valid data, the data outputs on DQ
7
1
) is shown in Figure 22.
Erase Suspend Read
(Erase Suspended Sector)
Erase Suspend Read
(Non-Erase Suspended Sector)
Erase Suspend Program
(Non-Erase Suspended Sector)
are reserve pins for future use.
Status
2
bit. However, successive reads from the erase-suspended sector will cause DQ
Table 8
-70/90/12
Hardware Sequence Flags
Data
DQ
DQ
DQ
DQ
DQ
0
0
1
0
to DQ
7
7
7
7
7
7
) may change asynchronously while the output
7
. Upon completion of the Embedded Program
6
(Note 1)
Toggle
Toggle
Toggle
Toggle
Toggle
Toggle
may be still invalid. The valid data on DQ
Data
DQ
1
6
7
output. Upon completion of the
6
Data
DQ
to toggle.
0
0
0
0
1
1
1
5
7
. During the Embedded
7
output. The flowchart
Data
DQ
7
0
1
0
0
0
1
0
at one instant of
3
(Note 2)
Toggle
Toggle
Data
DQ
N/A
N/A
1
1
1
2
2
to
7
0