CMX649 CML Microcircuits, CMX649 Datasheet - Page 43

• Manufacturer Part Number: CMX649
• Description: ADM Codec
• Manufacturer: CML Microcircuits

ADM Codec
CMX649
6.3.2 64kbps burst mode Bluetooth Compatible CVSD
//Initialize device with general reset
// This powers down everything excluding the xtal oscillator circuit
$01
//Setup analog section
// $61 00 filters set for 2.9kHz BW (default after reset)
// volume=0dB side_tone=-21dB and on
$62 $BF
// audio_level=0dB
$63 $80
// power_control everything on (lowest current setting)
$64 $55
$65 $55
// codec mode ADM buffered (burst bytes at 1/8 bit rate mode)
$70 $01
// Clock Divider Control
// with 4.096MHz master clock
// filter clock prescale/=2 main divider/=8 => 256kHz SCF clock
// bit clock prescale/=1 main divider/=1 since constant divider/=64 always => 64kHz bit clocks
$72 $E9 $00
// PLL is not running
// internal RX and TX bit clocks both from RX bit clock
// RX data input acting as digital input for burst mode
$73 $00 $70
// setup decoder
// decimate by 8
// decode adm input from RX Data
// adm estimator drives output
// decode vad driven by adm bits at bit rate
$D0 $00 $02
// adm encode feedback from comparator, nulling for improved idle – otherwise as decoder
$E0 $01 $02
// to enable offset nulling load small positive constant into encoder offset input reg
$E3 $00 $04
// adm mode BT CVSD algorithm
// syllabic tc=16ms
// step size dynamic range 1280/10
// companding rule = 4 of 4
// principal tc=0.5ms
// second order tc=N/A
// zero tc=N/A
// zero at bit_rate/2 disabled
$D1 $BD $A0
$E1 $BD $A0
// prime idle pattern into CBUS ADM source byte regs
$D8 $AA
$E8 $AA
// enable encoder and decoder with no IRQs
$81 $88
// Alternative settings for PCM format using second order ADM algorithm
// syllabic tc=16ms
// step size dynamic range 5120/10
// companding rule = 5 of 5
// principle tc=0.5ms
// second order tc=0.0625ms
// predictor zero tc=0.0234ms for encoder
// zero at bit_rate/2 enabled for decoder
//$D1 $AE $A1
//$E1 $AE $BA
// codec mode 2=linear PCM buffered (3=uLaw 4=Alaw)
//$70 $02
// decoder flow for input PCM plus transcode to ADM with offset null and output via VAD output.
//$D0 $57 $02
//$D3 $00 $04
2003 CML Microsystems Plc
43
D/649/2