FR65E Fujitsu Microelectronics, Inc., FR65E Datasheet - Page 15

• Manufacturer Part Number: FR65E
• Description: 32-bit Microcontroller
• Manufacturer: Fujitsu Microelectronics, Inc.

• Hardware standby at power-on startup
• Caution on Operations during PLL Clock Mode
• Remarks for the external clock operation
• Built-in DC-DC regulator
If a power-on startup is followed immediately by a hardware standby request, the reset initialization of settings
(INIT) from the INIT pin has priority. However in case of transition from the reset initialization (INIT) to hardware
standby, the oscillator stabilization wait period is initialized to maximum duration, and after release of the hardware
standby request the maximum setting is applied to the oscillator stabilization wait period.
If the PLL clock mode is selected, the microcontroller attempt to be working with the self-oscillating circuit even
when there is no external oscillator or external clock input is stopped. Performance of this operation, however,
cannot be guaranteed.
When selecting the external clock, active X0 pin generally. Also simultaneously the opposite phase clock to X0
must be supplied to X1 pin. When using the clock along with STOP (oscillation stopped) mode, the X1 pin stops
when “H” is input in STOP mode. To prevent one output from competing against another, in this case, the stop
mode must not be used.
Refer to the Data Sheet for maximum input frequency.
This device has a built-in regulator, requiring 3.3 V input to the V
0.1 F connected to the C pin for the regulator.
Note that the A/D converter requires a separate 3.3 V power supply.
Note : Stop mode (oscillation stop mode) cannot be used.
3.3 V
GND
Using external clock (normal)
V
AV
AVRH
AV
V
CC
SS
CC
SS
/AVRL
X0
X1
C
MB91307B
cc
pin and a bypass capacitor of approximately
0.1 F
MB91307B
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