FR65E Fujitsu Microelectronics, Inc., FR65E Datasheet - Page 60

• Manufacturer Part Number: FR65E
• Description: 32-bit Microcontroller
• Manufacturer: Fujitsu Microelectronics, Inc.

60
MB91307B
9. DMAC (DMA Controller)
(1) Overview
Hardware Configuration
Principal Functions
This module is used to accomplish DMA (Direct Memory Access) transfer on FR family devices.
DMA transfer controlled by this module increases system performance by enabling high speed transfer of many
types of data without going through the CPU.
This module is principally configured from the following units:
• Five independent DMA channels
• 5-channel independent access control circuit
• 32-bit address registers (reload enabled: 2 per channel)
• 16-bit transfer count registers (reload enabled: 2 per channel)
• 4-bit block count registers (1 per channel)
• External transfer request input pins: DREQ0,DREQ1,DREQ2 (ch0,1,2 only)
• External transfer request acknowledge output pins: DACK0,DACK1,DACK2 (ch0,1,2 only)
• DMA output completed pins: DEOP0,DEOP1,DEOP2 (ch0,1,2 only)
• Fly-by transfer (memory to I/O, memory to memory) (ch0,1,2 only)
• Two-cycle transfer
Data transfer using the DMAC module primarily involves the following functions:
• Supports independent data transfer on multiple channels (5 ch)
(1) Order of priority (ch.0
(2) The order can be reversed between ch.0-ch.1.
(3) DMAC startup sources
(4) Transfer modes
Input from an external-only pin (edge detection/level detection, ch0,1,2 only)
Request from a built-in peripheral (shared interrupt request, including external interrupts)
Software request (register write)
Demand transfer / burst transfer / step transfer / block transfer
Addressing mode 32-bit full address designation (increment/decrement/fixed)
Data type, byte / half-word / word length
Single-shot / reload selection available
(address increment can be specified up to -255 to +255)
ch.1
ch.2
ch.3
ch.4)