FR65E Fujitsu Microelectronics, Inc., FR65E Datasheet - Page 25

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FR65E

Manufacturer Part Number
FR65E
Description
32-bit Microcontroller
Manufacturer
Fujitsu Microelectronics, Inc.
Datasheet
1. Mode Pins
2. Mode Register (MODR)
[bit7-3] Reserved bits
[bit2] ROMA (Internal RAM enable bit)
[bit1, 0] WTH1, WTH0 (Bus width indicator bits)
MD2
Detailed register description >
SETTING MODE
In the FR family, the mode pins (MD2, MD1, MD0) and the mode register (MODR) are used to set the operating
mode.
The three pins MD2, MD1, MD0 are used in mode vector fetch instructions, and also to make settings in test mode.
The mode data fetch instruction writes data to the address “0000_07FD
The area “0000_07FD
operate the mode corresponding to that setting.
The mode register can only be set by a reset source at the INIT level. It is not possible to write to this register
from a user program.
These bits should always be set to “00000.” If set to any other value, stable operation is not assured.
This bit indicates whether internal RAM is enabled.
In external bus mode, these bits determine the bus width setting.
In external bus mode, the value of these bits sets the BW1, 0 bits in the AMD0 register (CS0 area).
0
No data exists at the FR family mode register address (0000_07FF
ROMA
Mode pin
MODR
Address
0000 07FD
MD1
0
1
0
WTH1
0
0
1
1
MD0
1
H
External ROM mode
Internal RAM mode
External ROM mode vector
H
” is the mode register (MODR). When a setting is made to this register, the device will
7
0
Function
Mode name
6
0
WTH0
0
1
0
1
5
0
4
0
The built-in RAM area functions as external area.
The built-in RAM area is enabled.
The 128 KB built-in RAM can be used.
Reset vector access
8-bit
16-bit
Setting prohibited
Setting prohibited
3
0
Outside
area
Operating mode setting bits
ROMA
2
H
WTH1
).
1
H
” called the mode data.
Bus width is set by mode register.
Remarks
WTH0
Bus width
0
XXXXXXXX
MB91307B
Remarks
Default
25

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