ACS8944 Semtech Corporation, ACS8944 Datasheet - Page 3

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ACS8944

Manufacturer Part Number
ACS8944
Description
Jitter Attenuating, Multiplying Phase Locked Loop for Oc-12/stm-4
Manufacturer
Semtech Corporation
Datasheet
Figure 2 ACS8944 Pin Diagram
Table 1 Power Pins
Note...I = Input, O = Output, P = Power, LVTTL/LVCMOS
with pull-down resistor.
Revision 3/November 2006 © Semtech Corp.
Pin Diagram
Pin Description
ADVANCED COMMUNICATIONS
1
25, 26
29, 43
34
38
39
49
Pin No.
VDDO1
VDDADIV
VDDP1,VDDP2
VDDARF
VDDOSC
VSSOSC
VSS0
Symbol
I/O
P
P
P
P
P
P
P
Dimensions: 7 mm x 7 mm
Lead Pitch: 0.5 mm
(Leads centered on package)
Connect large central pad
to GND
1
2
3
4
5
6
7
8
9
10 NC7
11 NC8
12 NC9
Type
-
-
-
-
-
-
-
VDDO1
OUTN
OUTP
NC1
NC2
NC3
NC4
NC5
NC6
Supply voltage. Supply to input and output pins. +3.3 Volts ±5%.
Supply ground. 0 V for VCO.
Supply voltage. Supply to OUTP & OUTN clock output pins, +3.3 Volts ±5%.
Supply voltage. Supply for internal dividers in VCO loop, kept as an isolated supply to
allow for low supply noise for the output divider stages. +3.3 Volts ±5%.
Supply voltage. Supply for phase and frequency detector (PFD), kept as an isolated supply
to allow for low supply noise. +3.3 Volts ±5%.
Supply voltage. Supply input to the internal VCO. +3.3 Volts +5%/-10%
Supply ground. Common 0 V.
This is the central leadframe pad on the underneath of the package.
U
= LVTTL/LVCMOS input with pull-up resistor, LVTTL/LVCMOS
FINAL
ACS8944
Page 3
Description
36
35
34
33
32
31
30
29
28
27
26
25
F8944_D_002PINDIAG_04
ACS8944 JAM PLL
VCN
VCP
VDDARF
NC15
NC14
NC13
NC12
VDDP1
CLKP
CLKN
VDDADIV
VDDADIV
D
= LVTTL/LVCMOS input
DATASHEET
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