LM1253A National Semiconductor, LM1253A Datasheet - Page 12
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LM1253A
Manufacturer Part Number
LM1253A
Description
Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator
Manufacturer
National Semiconductor
Datasheet
1.LM1253A.pdf
(57 pages)
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Pin Descriptions
VFLYBACK vertical flyback pulse is kept high during that ini-
tial period to prevent the output VBLANK from switching be-
tween high and low states.
Loss of vertical flyback pulse implies that the monitor is not
scanning, and therefore no image is being displayed. The
Pin 16 — SDA The I
2 k should be connected between this pin and +5V. A 300
resistor should be connected in series with the data line to
protect the IC against arcing. Figure 29 shows the external
schematic of pin 16, Figure 20 shows the internal schematic.
Pin 17 — SCL The I
2 k should be connected between this pin and +5V. A 300
resistor should be connected in series with the clock line to
protect the IC against arcing. Figure 29 shows the external
schematic of pin 17, Figure 20 shows the internal schematic.
2
2
C clock line. A pull up resistor of about
C data line. A pull up resistor of about
(Continued)
FIGURE 10. Vertical Flyback Input Pulse
12
VBLANK pulses are still required by the LM2453 CRT driver
in order to maintain correct bias conditions in the CRT until
the power supplies are switched off, but video will be set at
black level to prevent front of screen problems, using the
NO_VID line. See also the Loss of Vertical Flyback Pulse
section. Figure 29 shows the external schematic of pin 15,
Figure 19 shows the internal schematic.
Pin 18 — Digital Ground Ground for the OSD section of the
LM1253A. All ground pins of the LM1253A should be con-
nected together by a ground plane under the LM1253A. See
Figure 31 , which shows a sample layout.
Pin 19 — Digital Supply 5V supply for the OSD section of
the LM1253A. A 0.1 µF capacitor should be connected be-
tween pin 18 and pin 19, as close as possible to the
LM1253A.
DS101265-5
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