LM1253A National Semiconductor, LM1253A Datasheet - Page 27

• Manufacturer Part Number: LM1253A
• Description: Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator
• Manufacturer: National Semiconductor

Micro-Controller Interface
The micro-controller interfaces to the LM1253A pre-amp via
an I
Start Pulse followed by a byte comprised of a seven bit Slave
Device Address and a Read/Write bit. Since the first byte is
composed of both the address and the read/write bit the ad-
dress of the LM1253A for writing is BAh (1011 1010) and the
address for reading is BBh (1011 1011). The development
software provided by National Semiconductor will automati-
cally take care of the difference between the read and write
addresses if the target address under the communications
tab is set to BAh. Figures 39, 40 show a write and read se-
quence across the I
Write Sequence
The write sequence begins with a start condition which con-
sists of the master pulling SDA low while SCL is held high.
The slave device address is next sent. The address byte is
Read Sequence
Read sequences are comprised of two I
quences: The first is a write sequence that only transfers the
two byte address to be accessed. The second is a read se-
quence that starts at the address transferred in the previous
address only write access and increments to the next ad-
dress upon every data byte read. This is shown in Figure 40 .
2
C interface. The protocol of the interface begins with a
2
C interface.
2
C transfer se-
FIGURE 39. I
2
C Write Sequence
27
made up of an address of seven bits (7-1) and the read/write
bit (0). Bit 0 is low to indicate a write operation. Each byte
that is sent is followed by an acknowledge. When SCL is
high the master will release the SDA line. The slave must pull
SDA low to acknowledge. The register to be written to is next
sent in two bytes, the least significant byte being sent first.
The master can then send the data, which consists of one or
more bytes. Each data byte is followed by an acknowledge
bit. If more than one data byte is sent the data will increment
to the next address location. See Figure 39 .
DS101265-45
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