LM1253A National Semiconductor, LM1253A Datasheet - Page 45

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LM1253A

Manufacturer Part Number
LM1253A
Description
Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator
Manufacturer
National Semiconductor
Datasheet
Control Register Definitions
Red Bias Clamp Pulse Amplitude Control Register (I
REGISTER NAME: RBIASCTRL (8436h)
Bit 7
Bits 7–0: Red Channel Bias Clamp Pulse Amplitude Control. These six bits determine the bias clamp value for its pulse ampli-
Brightness Amplitude Control Register (I
REGISTER NAME: BRIGHTCTRL (8437h)
Bit 7
Bits 7–0: Brightness Amplitude Control. These six bits determine amplitude of brightness for all three channels.
DC Offset and OSD Contrast Control Register (I
REGISTER NAME: DCOFFSET (8438h)
Bit 7
Bits 2–0: DC Offset Control. These three bits determine the active video DC offset to all three channels.
Bits 4–3: OSD Contrast. These two bits determine the OSD contrast.
Bits 7–5: Blanking pedestal. These three bits determine the blanking pedestal offset for all three channels.
Global Video Control Register (I
REGISTER NAME: GLOBALCTRL (8439h)
Bit 7
Bit 0:
Bit 1:
Bits 7–2: RESERVED.
PLL Frequency Range Control Register (I
REGISTER NAME: PLLFREQRNG (843Eh)
Bit 7
Bits 1–0: PLL Frequency Range Control. These bits assist the PLL in locking to the desired pixel frequency. PLL Range should
Bits 3–2: Sets the approximate Free Run Frequency.
Bits 7–4: RESERVED. Set to 0
RC7
RSV
BA7
RSV
BP2
RC6
RSV
BA6
RSV
tude.
Blank Video. When this bit is a one, the video output is blanked. When this bit is a zero normal video is output.
Power Save. When this bit is a one, the analog circuits are shutdown to support sleep mode. When this bit is a zero
the analog circuits are enabled for normal operation. See the Power Save Mode section.
be set as shown in Table 12 .
00: 38 kHz, 01: 43 kHz, 10: 47 kHz, 11: 52 kHz.
RSV
RC5
BP1
BA5
RSV
RC4
RSV
BA4
RSV
BP0
RC3
RSV
BA3
2
C address 8439h).
IVS1
RSV
RC2
BA2
OSD C1
2
2
C address 8437h).
C address 843Eh).
IVS0
RC1
BA1
(Continued)
PS
2
C address 8438h).
OSD C0
RC0
PFR1
BA0
2
BV
Bit 0
Bit 0
Bit 0
C address 8436h).
45
PFR0
Bit 0
DC2
DC1
DC0
Bit 0
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