USB3250 Standard Microsystems Corporation, USB3250 Datasheet - Page 37

• Manufacturer Part Number: USB3250
• Description: Usb2.0 PHY IC
• Manufacturer: Standard Microsystems Corporation

USB2.0 PHY IC
Datasheet
SMSC GT3200, SMSC USB3250
XCVRSELECT
TERMSELECT
PARAMETER
OPMODE 0
OPMODE 1
TIMING
TXVALID
T0
T1
T2
T3
T4
T5
DP/DM
Note 8.1
Note 8.2
time
Figure 8.3 HS Detection Handshake Timing Behavior (FS Mode)
T0
HS Handshake begins. DP pull-up enabled, HS
terminations disabled. The XCVRSELECT and
OPMODE inputs are then set for HS with bitstuffing
disabled, and TXVALID is asserted at least 5
60MHz clocks later.
Device enables HS Transceiver and asserts Chirp
K on the bus.
Device removes Chirp K from the bus. 1ms
minimum width.
Earliest time when downstream facing port may
assert Chirp KJ sequence on the bus.
Chirp not detected by the device. Device reverts to
FS default state and waits for end of reset.
Earliest time at which host port may end reset
Table 8.6 HS Detection Handshake Timing Values (FS Mode)
T0 may occur to 4ms after HS Reset T0.
The SIE must assert the Chirp K for 66000 CLK60 cycles to ensure a 1ms minimum
duration.
DESCRIPTION
DATASHEET
37
Device Chirp K
T1
T2
T3
Downstream
Facing Port
Chirps
No
0 (reference)
T0 < T1 < HS Reset T0 + 6.0ms
T1 + 1.0 ms < T2 < HS Reset
T0 + 7.0ms
T2 < T3 < T2+100µs
T2 + 1.0ms < T4 < T2 + 2.5ms
HS Reset T0 + 10ms
T4
FS Mode
VALUE
SE0
Revision 1.5 (03-24-06)
T5
SOF