LM27262 National Semiconductor Corporation, LM27262 Datasheet - Page 15

• Manufacturer Part Number: LM27262
• Description: Intel Cpu Core Voltage Regulator Controller For VRD10 Compatible PCS
• Manufacturer: National Semiconductor Corporation

Operation Descriptions
be recalculated as 1.4V / 1.74kΩ = 80.46mA. Using a stan-
dard 309Ω, 1% value for the offset resistor produces a
nominal offset voltage of 24.86mV for an error of 0.14mV.
LOAD LINE SLOPE
The Load Line Slope (LLS) is commonly known as Adaptive
Voltage Positioning (AVP). In the LM27262 the AVP is imple-
mented as “active voltage positioning”. Active voltage posi-
tioning synthesizes the load line actively so as to limit power
dissipation. In a typical four-phase application using 2 mΩ
sense resistors, the effective impedance due to the resistors
is only 0.5 mΩ. Yet with active voltage positioning an effec-
tive 1.3 mΩ impedance is synthesized with no additional
losses. If implemented in a purely passive manner, nearly
three times the losses would be incurred.
For an LM27262 application the LLS can be calculated as
follows:
Slope = 3.818 x RSENSE x R2/(R7+R2); where 3.818 is a
function of the gain of the LM27262’s internal load line
circuit; Slope and RSENSE are measured in mΩ. Referring
to the typical application circuit, the total resistance of the
R7+R2 resistor divider should be about 5.5kΩ. For a slope of
resistor values calculate as R7=4.75kΩ and R2=976Ω. The
LM27262 will automatically compensate if the number of
active phases is reduced to either two or three.
OUTPUT OVER-CURRENT PROTECTION (OCP) and
PROGRAMMABLE CURRENT LIMIT
The LM27262 has a genuine OCP feature based on actual
load current measurement as a voltage drop across the
current sense resistors. Unlike some other OCP techniques,
such as a short-circuit protection based on detection of an
under-voltage condition, this true current limit approach al-
lows a system designer to use power train components that
are not significantly over designed. There is also a time
delayed latch off feature that will be discussed later to further
protect the regulator from sever overload conditions. The
LM27262 has a CLIMADJ input that allows the voltage regu-
lator designer to set the current limit threshold via a simple
resistor divider. Refer to Figure 4 below. The current limit is
programmed for each phase. For instance, for a 44A current
limit in a 2-phase application program 22A per phase; for
44A current limit in a 4-phase application, program 11A per
phase. In the latter case, the programming resistor R1
should be smaller. The current limit threshold will change
somewhat as a function of input voltage and die tempera-
ture, reducing somewhat at higher input line voltages and
temperatures. This is due largely to changes in inductor
ripple current. Therefore, current limiting should be tested at
the highest input voltage and operating temperature likely to
be encountered in a particular application. Some empirical
adjustment of the current limit program resistors may be
necessary.
–1.3 mΩ and 2 mΩ current sense resistors the 1% standard
(Continued)
15
Total resistance of R1+R2 resistor divider should be approxi-
mately 50kΩ
VREF output while higher values may increase the OCP
threshold error due to variations in CLIMADJ pin input bias
current.
To calculate the divider values assuming a total divider re-
sistance of 50kΩ:
V
R1=V
R2= R1 x (V
A 0.1µF filter capacitor should be connected across R1 for
reducing switching noise pickup.
Careful connection to the current sense resistors is crucial
for OCP threshold accuracy. Always use Kelvin connections
to low value sense resistors in order to minimize the effects
of trace resistance. With only a couple of µΩs of sense
resistance, a few hundred µΩs of trace resistance will result
in significant measurement errors. The connections to all
sense resistors should be as close to physically identical as
possible to ensure good phase-to-phase matching.
Generally, the worst-case low limit for the OCP threshold
should be set at least 10% to 15% above the maximum
desired continuous load current. The voltage across the
current sense resistors at the onset of current limit is ap-
proximately 48% of the voltage between the CLIMADJ pin
and Vref. Keep in mind that the current limit is pulse by
pulse, so the peak inductor current needs to be calculated to
determine the actual current limit trip point.
In order to avoid noisy current sense measurements, it is
usually desirable to add small RC filters at the current sense
inputs (see Figure 4). Typical values are on the order of 1Ω
and 0.1µF. These filters will slow down the current limit
circuit’s response time a bit and increase the actual current
limit relative to the theoretically expected value. The 48%
scale factor mentioned above includes an empirical adjust-
ment for this. It will be necessary to verify the final value
experimentally.
SOFT START, VIDPGD DELAY and TURN-ON TIME
The soft-start feature minimizes inrush current and prevents
output voltage overshoot. The SOFTCAP pin has an internal
current source of approximately 3.2µA that charges a pro-
gramming soft-start/soft-stop capacitor. There is an approxi-
mately 2msec built-in delay between the time that VRON is
asserted and the SOFTCAP starts charging. This allows the
VID code to settle before the switching regulator turns on.
The soft-start ramp time can be calculated using the follow-
ing formula:
R1
= V
R1
RS
x 50kΩ/ V
/ 0.48
FIGURE 4. Current Sense Filtering
REF
±
10%. Lower values will tend to overload the
- V
REF
R1
) / V
R1
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