ATA5423 ATMEL Corporation, ATA5423 Datasheet - Page 43

• Manufacturer Part Number: ATA5423
• Manufacturer: ATMEL Corporation

Table 7-21.
7.4
7.4.1
4841A–RKE–02/05
Lim_max5
0
0
0
1
.
.
Status Register
Status Register (ADR 8)
Control Register 6 (Function of Bit 5, Bit 4, Bit 3, Bit 2, Bit 1 and Bit 0)
Lim_max4
0
0
1
1
.
.
The status register indicates the current status of the transceiver and is readable via the 4–wire
serial interface. Setting Power_On or P_On_Aux or an event on ST1, ST2, ST3, ST4 or ST5 is
indicated by an IRQ.
Reading the status register resets the bits Power_On, Low_Batt, P_On_Aux and the IRQ.
Table 7-22.
Lim_max3
Status Bit
ST5
ST4
ST3
ST2
ST1
1
1
1
1
.
.
Status Register
Lim_max2
Function
Status of pin T5
Pin T5 = 0
Pin T5 = 1
(see
Status of pin T4
Pin T4 = 0
Pin T4 = 1
(see
Status of pin T3
Pin T3 = 0
Pin T3 = 1
(see
Status of pin T2
Pin T2 = 0
Pin T2 = 1
(see
Status of pin T1
Pin T1 = 0
Pin T1 = 1
(see
1
1
1
1
.
.
Figure 7-3 on page
Figure 7-3 on page
Figure 7-3 on page
Figure 7-3 on page
Figure 7-3 on page
ST5 = 0
ST4 = 1
ST4 = 0
ST3 = 1
ST3 = 0
ST2 = 1
ST2 = 0
ST1 = 1
ST1 = 0
Lim_max1
ST5 = 1
0
0
0
1
.
.
ATA5423/25/28/29 [Preliminary]
45)
45)
45)
45)
45)
Lim_max0
0
1
0
1
.
.
(T
(Lim_max < 12 is not Applicable)
Lim_max
(T
Lim_max
Function Lim_max
= (Lim_max – 1)
= (28 – 1)
(default)
12
13
28
63
T
XDCLK
T
XDCLK
)
)
43